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target/riscv: cpu: Remove compile time XLEN checks

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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-id: a426ead44db5065a0790066d43e91245683509d7.1608142916.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2020-12-16 10:22:56 -08:00
parent 114baaca51
commit 5c5a47f10c
1 changed files with 10 additions and 9 deletions
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19
target/riscv/cpu.c
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@ -240,10 +240,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid); qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", (target_ulong)env->mstatus); qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", (target_ulong)env->mstatus);
#ifdef TARGET_RISCV32 if (riscv_cpu_is_32bit(env)) {
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatush ", qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatush ",
(target_ulong)(env->mstatus >> 32)); (target_ulong)(env->mstatus >> 32));
#endif }
if (riscv_has_ext(env, RVH)) { if (riscv_has_ext(env, RVH)) {
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "hstatus ", env->hstatus); qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "hstatus ", env->hstatus);
qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vsstatus ", qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "vsstatus ",
@ -356,11 +356,12 @@ static void riscv_cpu_reset(DeviceState *dev)
static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{ {
#if defined(TARGET_RISCV32) RISCVCPU *cpu = RISCV_CPU(s);
info->print_insn = print_insn_riscv32; if (riscv_cpu_is_32bit(&cpu->env)) {
#elif defined(TARGET_RISCV64) info->print_insn = print_insn_riscv32;
info->print_insn = print_insn_riscv64; } else {
#endif info->print_insn = print_insn_riscv64;
}
} }
static void riscv_cpu_realize(DeviceState *dev, Error **errp) static void riscv_cpu_realize(DeviceState *dev, Error **errp)