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target/loongarch: move translate modules to tcg/
Introduce the target/loongarch/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240102020200.3462097-2-gaosong@loongson.cn>
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beb60920a1
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24 changed files with 20 additions and 14 deletions
207
target/loongarch/tcg/insn_trans/trans_farith.c.inc
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207
target/loongarch/tcg/insn_trans/trans_farith.c.inc
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef CONFIG_USER_ONLY
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#define CHECK_FPE do { \
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if ((ctx->base.tb->flags & HW_FLAGS_EUEN_FPE) == 0) { \
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generate_exception(ctx, EXCCODE_FPD); \
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return true; \
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} \
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} while (0)
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#else
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#define CHECK_FPE
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#endif
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static bool gen_fff(DisasContext *ctx, arg_fff *a,
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void (*func)(TCGv, TCGv_env, TCGv, TCGv))
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src1 = get_fpr(ctx, a->fj);
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TCGv src2 = get_fpr(ctx, a->fk);
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CHECK_FPE;
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func(dest, tcg_env, src1, src2);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool gen_ff(DisasContext *ctx, arg_ff *a,
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void (*func)(TCGv, TCGv_env, TCGv))
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src = get_fpr(ctx, a->fj);
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CHECK_FPE;
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func(dest, tcg_env, src);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool gen_muladd(DisasContext *ctx, arg_ffff *a,
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void (*func)(TCGv, TCGv_env, TCGv, TCGv, TCGv, TCGv_i32),
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int flag)
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{
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TCGv_i32 tflag = tcg_constant_i32(flag);
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src1 = get_fpr(ctx, a->fj);
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TCGv src2 = get_fpr(ctx, a->fk);
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TCGv src3 = get_fpr(ctx, a->fa);
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CHECK_FPE;
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func(dest, tcg_env, src1, src2, src3, tflag);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fcopysign_s(DisasContext *ctx, arg_fcopysign_s *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src1 = get_fpr(ctx, a->fk);
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TCGv src2 = get_fpr(ctx, a->fj);
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if (!avail_FP_SP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_deposit_i64(dest, src1, src2, 0, 31);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fcopysign_d(DisasContext *ctx, arg_fcopysign_d *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src1 = get_fpr(ctx, a->fk);
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TCGv src2 = get_fpr(ctx, a->fj);
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if (!avail_FP_DP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_deposit_i64(dest, src1, src2, 0, 63);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fabs_s(DisasContext *ctx, arg_fabs_s *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src = get_fpr(ctx, a->fj);
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if (!avail_FP_SP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_andi_i64(dest, src, MAKE_64BIT_MASK(0, 31));
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gen_nanbox_s(dest, dest);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fabs_d(DisasContext *ctx, arg_fabs_d *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src = get_fpr(ctx, a->fj);
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if (!avail_FP_DP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_andi_i64(dest, src, MAKE_64BIT_MASK(0, 63));
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fneg_s(DisasContext *ctx, arg_fneg_s *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src = get_fpr(ctx, a->fj);
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if (!avail_FP_SP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_xori_i64(dest, src, 0x80000000);
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gen_nanbox_s(dest, dest);
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set_fpr(a->fd, dest);
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return true;
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}
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static bool trans_fneg_d(DisasContext *ctx, arg_fneg_d *a)
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{
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TCGv dest = get_fpr(ctx, a->fd);
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TCGv src = get_fpr(ctx, a->fj);
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if (!avail_FP_DP(ctx)) {
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return false;
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}
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CHECK_FPE;
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tcg_gen_xori_i64(dest, src, 0x8000000000000000LL);
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set_fpr(a->fd, dest);
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return true;
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}
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TRANS(fadd_s, FP_SP, gen_fff, gen_helper_fadd_s)
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TRANS(fadd_d, FP_DP, gen_fff, gen_helper_fadd_d)
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TRANS(fsub_s, FP_SP, gen_fff, gen_helper_fsub_s)
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TRANS(fsub_d, FP_DP, gen_fff, gen_helper_fsub_d)
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TRANS(fmul_s, FP_SP, gen_fff, gen_helper_fmul_s)
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TRANS(fmul_d, FP_DP, gen_fff, gen_helper_fmul_d)
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TRANS(fdiv_s, FP_SP, gen_fff, gen_helper_fdiv_s)
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TRANS(fdiv_d, FP_DP, gen_fff, gen_helper_fdiv_d)
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TRANS(fmax_s, FP_SP, gen_fff, gen_helper_fmax_s)
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TRANS(fmax_d, FP_DP, gen_fff, gen_helper_fmax_d)
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TRANS(fmin_s, FP_SP, gen_fff, gen_helper_fmin_s)
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TRANS(fmin_d, FP_DP, gen_fff, gen_helper_fmin_d)
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TRANS(fmaxa_s, FP_SP, gen_fff, gen_helper_fmaxa_s)
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TRANS(fmaxa_d, FP_DP, gen_fff, gen_helper_fmaxa_d)
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TRANS(fmina_s, FP_SP, gen_fff, gen_helper_fmina_s)
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TRANS(fmina_d, FP_DP, gen_fff, gen_helper_fmina_d)
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TRANS(fscaleb_s, FP_SP, gen_fff, gen_helper_fscaleb_s)
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TRANS(fscaleb_d, FP_DP, gen_fff, gen_helper_fscaleb_d)
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TRANS(fsqrt_s, FP_SP, gen_ff, gen_helper_fsqrt_s)
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TRANS(fsqrt_d, FP_DP, gen_ff, gen_helper_fsqrt_d)
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TRANS(frecip_s, FP_SP, gen_ff, gen_helper_frecip_s)
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TRANS(frecip_d, FP_DP, gen_ff, gen_helper_frecip_d)
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TRANS(frsqrt_s, FP_SP, gen_ff, gen_helper_frsqrt_s)
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TRANS(frsqrt_d, FP_DP, gen_ff, gen_helper_frsqrt_d)
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TRANS(flogb_s, FP_SP, gen_ff, gen_helper_flogb_s)
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TRANS(flogb_d, FP_DP, gen_ff, gen_helper_flogb_d)
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TRANS(fclass_s, FP_SP, gen_ff, gen_helper_fclass_s)
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TRANS(fclass_d, FP_DP, gen_ff, gen_helper_fclass_d)
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TRANS(fmadd_s, FP_SP, gen_muladd, gen_helper_fmuladd_s, 0)
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TRANS(fmadd_d, FP_DP, gen_muladd, gen_helper_fmuladd_d, 0)
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TRANS(fmsub_s, FP_SP, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_c)
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TRANS(fmsub_d, FP_DP, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_c)
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TRANS(fnmadd_s, FP_SP, gen_muladd, gen_helper_fmuladd_s, float_muladd_negate_result)
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TRANS(fnmadd_d, FP_DP, gen_muladd, gen_helper_fmuladd_d, float_muladd_negate_result)
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TRANS(fnmsub_s, FP_SP, gen_muladd, gen_helper_fmuladd_s,
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float_muladd_negate_c | float_muladd_negate_result)
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TRANS(fnmsub_d, FP_DP, gen_muladd, gen_helper_fmuladd_d,
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float_muladd_negate_c | float_muladd_negate_result)
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