target/microblaze: Split out FSR from env->sregs

Continue eliminating the sregs array in favor of individual members.
Does not correct the width of FSR, yet.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-08-19 21:54:38 -07:00
parent 78e9caf2f9
commit 5a8e01366c
5 changed files with 13 additions and 10 deletions

View file

@ -175,19 +175,19 @@ static void update_fpu_flags(CPUMBState *env, int flags)
int raise = 0;
if (flags & float_flag_invalid) {
env->sregs[SR_FSR] |= FSR_IO;
env->fsr |= FSR_IO;
raise = 1;
}
if (flags & float_flag_divbyzero) {
env->sregs[SR_FSR] |= FSR_DZ;
env->fsr |= FSR_DZ;
raise = 1;
}
if (flags & float_flag_overflow) {
env->sregs[SR_FSR] |= FSR_OF;
env->fsr |= FSR_OF;
raise = 1;
}
if (flags & float_flag_underflow) {
env->sregs[SR_FSR] |= FSR_UF;
env->fsr |= FSR_UF;
raise = 1;
}
if (raise