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tcg: Merge INDEX_op_clz_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7 changed files with 22 additions and 27 deletions
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@ -358,7 +358,7 @@ Logical
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- | *t0* = *t1* | ~\ *t2*
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* - clz_i32/i64 *t0*, *t1*, *t2*
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* - clz *t0*, *t1*, *t2*
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- | *t0* = *t1* ? clz(*t1*) : *t2*
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@ -42,6 +42,7 @@ DEF(mov, 1, 1, 0, TCG_OPF_INT | TCG_OPF_NOT_PRESENT)
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DEF(add, 1, 2, 0, TCG_OPF_INT)
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DEF(and, 1, 2, 0, TCG_OPF_INT)
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DEF(andc, 1, 2, 0, TCG_OPF_INT)
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DEF(clz, 1, 2, 0, TCG_OPF_INT)
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DEF(divs, 1, 2, 0, TCG_OPF_INT)
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DEF(divs2, 2, 3, 0, TCG_OPF_INT)
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DEF(divu, 1, 2, 0, TCG_OPF_INT)
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@ -95,7 +96,6 @@ DEF(setcond2_i32, 1, 4, 1, 0)
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DEF(bswap16_i32, 1, 1, 1, 0)
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DEF(bswap32_i32, 1, 1, 1, 0)
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DEF(clz_i32, 1, 2, 0, 0)
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DEF(ctz_i32, 1, 2, 0, 0)
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DEF(ctpop_i32, 1, 1, 0, 0)
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@ -130,7 +130,6 @@ DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH)
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DEF(bswap16_i64, 1, 1, 1, 0)
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DEF(bswap32_i64, 1, 1, 1, 0)
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DEF(bswap64_i64, 1, 1, 1, 0)
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DEF(clz_i64, 1, 2, 0, 0)
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DEF(ctz_i64, 1, 2, 0, 0)
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DEF(ctpop_i64, 1, 1, 0, 0)
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@ -503,10 +503,10 @@ static uint64_t do_constant_folding_2(TCGOpcode op, TCGType type,
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case INDEX_op_nor_vec:
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return ~(x | y);
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case INDEX_op_clz_i32:
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return (uint32_t)x ? clz32(x) : y;
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case INDEX_op_clz_i64:
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case INDEX_op_clz:
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if (type == TCG_TYPE_I32) {
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return (uint32_t)x ? clz32(x) : y;
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}
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return x ? clz64(x) : y;
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case INDEX_op_ctz_i32:
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@ -2898,7 +2898,7 @@ void tcg_optimize(TCGContext *s)
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case INDEX_op_bswap64_i64:
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done = fold_bswap(&ctx, op);
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break;
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CASE_OP_32_64(clz):
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case INDEX_op_clz:
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CASE_OP_32_64(ctz):
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done = fold_count_zeros(&ctx, op);
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break;
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22
tcg/tcg-op.c
22
tcg/tcg-op.c
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@ -723,9 +723,9 @@ void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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{
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if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0)) {
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tcg_gen_op3_i32(INDEX_op_clz_i32, ret, arg1, arg2);
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} else if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I32, 0)) {
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tcg_gen_op3_i32(INDEX_op_clz, ret, arg1, arg2);
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} else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
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TCGv_i64 t1 = tcg_temp_ebb_new_i64();
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TCGv_i64 t2 = tcg_temp_ebb_new_i64();
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tcg_gen_extu_i32_i64(t1, arg1);
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@ -770,8 +770,7 @@ void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
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tcg_gen_subi_i32(t, arg1, 1);
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tcg_gen_andc_i32(t, t, arg1);
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tcg_gen_ctpop_i32(t, t);
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} else if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0) ||
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tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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} else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_REG, 0)) {
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t = tcg_temp_ebb_new_i32();
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tcg_gen_neg_i32(t, arg1);
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tcg_gen_and_i32(t, t, arg1);
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@ -803,8 +802,7 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
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void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg)
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{
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if (tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0) ||
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tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_REG, 0)) {
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TCGv_i32 t = tcg_temp_ebb_new_i32();
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tcg_gen_sari_i32(t, arg, 31);
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tcg_gen_xor_i32(t, t, arg);
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@ -2340,8 +2338,8 @@ void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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{
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if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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tcg_gen_op3_i64(INDEX_op_clz_i64, ret, arg1, arg2);
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if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
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tcg_gen_op3_i64(INDEX_op_clz, ret, arg1, arg2);
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} else {
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gen_helper_clz_i64(ret, arg1, arg2);
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}
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@ -2351,7 +2349,7 @@ void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
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{
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if (TCG_TARGET_REG_BITS == 32
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&& arg2 <= 0xffffffffu
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&& tcg_op_supported(INDEX_op_clz_i32, TCG_TYPE_I32, 0)) {
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&& tcg_op_supported(INDEX_op_clz, TCG_TYPE_I32, 0)) {
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TCGv_i32 t = tcg_temp_ebb_new_i32();
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tcg_gen_clzi_i32(t, TCGV_LOW(arg1), arg2 - 32);
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tcg_gen_addi_i32(t, t, 32);
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@ -2376,7 +2374,7 @@ void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
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tcg_gen_subi_i64(t, arg1, 1);
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tcg_gen_andc_i64(t, t, arg1);
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tcg_gen_ctpop_i64(t, t);
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} else if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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} else if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
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t = tcg_temp_ebb_new_i64();
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tcg_gen_neg_i64(t, arg1);
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tcg_gen_and_i64(t, t, arg1);
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@ -2419,7 +2417,7 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
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void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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if (tcg_op_supported(INDEX_op_clz_i64, TCG_TYPE_I64, 0)) {
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if (tcg_op_supported(INDEX_op_clz, TCG_TYPE_I64, 0)) {
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TCGv_i64 t = tcg_temp_ebb_new_i64();
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tcg_gen_sari_i64(t, arg, 63);
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tcg_gen_xor_i64(t, t, arg);
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@ -1026,8 +1026,7 @@ static const TCGOutOp * const all_outop[NB_OPS] = {
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OUTOP(INDEX_op_add, TCGOutOpBinary, outop_add),
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OUTOP(INDEX_op_and, TCGOutOpBinary, outop_and),
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OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc),
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OUTOP(INDEX_op_clz_i32, TCGOutOpBinary, outop_clz),
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OUTOP(INDEX_op_clz_i64, TCGOutOpBinary, outop_clz),
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OUTOP(INDEX_op_clz, TCGOutOpBinary, outop_clz),
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OUTOP(INDEX_op_divs, TCGOutOpBinary, outop_divs),
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OUTOP(INDEX_op_divu, TCGOutOpBinary, outop_divu),
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OUTOP(INDEX_op_divs2, TCGOutOpDivRem, outop_divs2),
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@ -5402,8 +5401,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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case INDEX_op_add:
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case INDEX_op_and:
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case INDEX_op_andc:
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case INDEX_op_clz_i32:
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case INDEX_op_clz_i64:
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case INDEX_op_clz:
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case INDEX_op_divs:
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case INDEX_op_divu:
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case INDEX_op_eqv:
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@ -733,7 +733,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tci_args_rrr(insn, &r0, &r1, &r2);
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regs[r0] = (uint64_t)regs[r1] % (uint64_t)regs[r2];
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break;
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case INDEX_op_clz_i64:
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case INDEX_op_clz:
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tci_args_rrr(insn, &r0, &r1, &r2);
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regs[r0] = regs[r1] ? clz64(regs[r1]) : regs[r2];
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break;
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@ -1052,6 +1052,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
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case INDEX_op_add:
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case INDEX_op_and:
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case INDEX_op_andc:
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case INDEX_op_clz:
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case INDEX_op_divs:
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case INDEX_op_divu:
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case INDEX_op_eqv:
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@ -1069,7 +1070,6 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
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case INDEX_op_shr:
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case INDEX_op_sub:
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case INDEX_op_xor:
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case INDEX_op_clz_i64:
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case INDEX_op_ctz_i32:
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case INDEX_op_ctz_i64:
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case INDEX_op_tci_clz32:
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@ -633,7 +633,7 @@ static void tgen_clz(TCGContext *s, TCGType type,
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{
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TCGOpcode opc = (type == TCG_TYPE_I32
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? INDEX_op_tci_clz32
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: INDEX_op_clz_i64);
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: INDEX_op_clz);
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tcg_out_op_rrr(s, opc, a0, a1, a2);
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}
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