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-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJZbKllAAoJEJykq7OBq3PIULAIAIcsTIM8KzMJBF/L/IQKm/mz OjPYHqyVazCCfrlHTlPBZNKrAjEatsjoUevPB7bCRbpI4sg4pZODmeIz0RbnYBdk aR7AepJTzWKATPhJEuOJe0YlXqrsCnB+cByoulGw8HWQJ8aZyn6iQZJN98zSCO8j 38eB0URMAkdLBCPaxbhQ5EwJi40AL2bN5ogGc02NRzx0CdVU3UUEiDDZ+j3F+Iz3 yGmqfrDHR6kndBuBh8nxv3Bb9ahZ1g7KU9RT2u0i1YzPCwOXFn/AlelteM/yJrWb vrDfQOC9PQoow7KdsG22mlXoHZ3O4eiGMTK80uxUQsCBh9VVjUQJGIgulGtGAxc= =2mu5 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging # gpg: Signature made Mon 17 Jul 2017 13:11:17 BST # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/tracing-pull-request: trace: update old trace events in docs trace: [trivial] Statically enable all guest events trace: [tcg, trivial] Re-align generated code trace: [tcg] Do not generate TCG code to trace dynamically-disabled events exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state trace: [tcg] Delay changes to dynamic state when translating trace: Allocate cpu->trace_dstate in place Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
5a477a7806
24 changed files with 137 additions and 74 deletions
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@ -330,6 +330,9 @@ struct TranslationBlock {
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#define CF_USE_ICOUNT 0x20000
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#define CF_IGNORE_ICOUNT 0x40000 /* Do not generate icount code */
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/* Per-vCPU dynamic tracing state used to generate this TB */
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uint32_t trace_vcpu_dstate;
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uint16_t invalid;
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void *tc_ptr; /* pointer to the translated code */
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@ -49,7 +49,7 @@
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* contiguous in memory.
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*/
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static inline
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uint32_t tb_hash_func5(uint64_t a0, uint64_t b0, uint32_t e)
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uint32_t tb_hash_func6(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f)
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{
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uint32_t v1 = TB_HASH_XX_SEED + PRIME32_1 + PRIME32_2;
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uint32_t v2 = TB_HASH_XX_SEED + PRIME32_2;
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@ -78,11 +78,14 @@ uint32_t tb_hash_func5(uint64_t a0, uint64_t b0, uint32_t e)
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v4 *= PRIME32_1;
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h32 = rol32(v1, 1) + rol32(v2, 7) + rol32(v3, 12) + rol32(v4, 18);
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h32 += 20;
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h32 += 24;
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h32 += e * PRIME32_3;
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h32 = rol32(h32, 17) * PRIME32_4;
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h32 += f * PRIME32_3;
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h32 = rol32(h32, 17) * PRIME32_4;
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h32 ^= h32 >> 15;
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h32 *= PRIME32_2;
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h32 ^= h32 >> 13;
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@ -58,9 +58,10 @@ static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc)
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#endif /* CONFIG_SOFTMMU */
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static inline
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uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags)
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uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags,
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uint32_t trace_vcpu_dstate)
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{
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return tb_hash_func5(phys_pc, pc, flags);
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return tb_hash_func6(phys_pc, pc, flags, trace_vcpu_dstate);
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}
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#endif
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