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hw/intc/loongarch_extioi: Get cpu number from possible_cpu_arch_ids
Supported CPU number can be acquired from function possible_cpu_arch_ids(), cpu-num property is not necessary. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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38adceb4c3
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5a3e068d41
3 changed files with 17 additions and 8 deletions
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@ -347,12 +347,6 @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
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s->status |= BIT(EXTIOI_ENABLE);
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}
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s->cpu = g_new0(ExtIOICore, s->num_cpu);
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if (s->cpu == NULL) {
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error_setg(errp, "Memory allocation for ExtIOICore faile");
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return;
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}
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for (i = 0; i < s->num_cpu; i++) {
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for (pin = 0; pin < LS3A_INTC_IP; pin++) {
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qdev_init_gpio_out(dev, &s->cpu[i].parent_irq[pin], 1);
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@ -13,11 +13,24 @@
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static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
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{
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LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
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MachineState *machine = MACHINE(qdev_get_machine());
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const CPUArchIdList *id_list;
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int i;
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if (s->num_cpu == 0) {
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error_setg(errp, "num-cpu must be at least 1");
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assert(mc->possible_cpu_arch_ids);
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id_list = mc->possible_cpu_arch_ids(machine);
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s->num_cpu = id_list->len;
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s->cpu = g_new0(ExtIOICore, s->num_cpu);
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if (s->cpu == NULL) {
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error_setg(errp, "Memory allocation for ExtIOICore faile");
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return;
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}
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for (i = 0; i < s->num_cpu; i++) {
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s->cpu[i].arch_id = id_list->cpus[i].arch_id;
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s->cpu[i].cpu = CPU(id_list->cpus[i].cpu);
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}
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}
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static int loongarch_extioi_common_pre_save(void *opaque)
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@ -65,6 +65,8 @@ typedef struct ExtIOICore {
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uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
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DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
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qemu_irq parent_irq[LS3A_INTC_IP];
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uint64_t arch_id;
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CPUState *cpu;
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} ExtIOICore;
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struct LoongArchExtIOICommonState {
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