Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf

* 'ppc-next' of git://repo.or.cz/qemu/agraf:
  PPC: fix mpc8544ds pci default devices
  Fix segfault on screendump with -nographic
  PPC: install mpc8544ds.dtb
  PPC: fix sregs usage on booke
  ppc: Fix compilation for ppc64-softmmu

Makefile

@@ -185,6 +185,7 @@ ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc \
 pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
 pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
 bamboo.dtb petalogix-s3adsp1800.dtb petalogix-ml605.dtb \
+mpc8544ds.dtb \
 multiboot.bin linuxboot.bin \
 s390-zipl.rom \
 spapr-rtas.bin slof.bin

console.c

@@ -180,7 +180,7 @@ void vga_hw_screen_dump(const char *filename)
     active_console = consoles[0];
     /* There is currently no way of specifying which screen we want to dump,
        so always dump the first one.  */
-    if (consoles[0]->hw_screen_dump)
+    if (consoles[0] && consoles[0]->hw_screen_dump)
         consoles[0]->hw_screen_dump(consoles[0]->hw, filename);
     active_console = previous_active_console;
 }

hw/ppce500_mpc8544ds.c

@@ -275,7 +275,7 @@ static void mpc8544ds_init(ram_addr_t ram_size,
                                 mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
                                 mpic[pci_irq_nrs[2]], mpic[pci_irq_nrs[3]],
                                 NULL);
-    pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
+    pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
     if (!pci_bus)
         printf("couldn't create PCI controller!\n");
 

target-ppc/kvm.c

@@ -45,9 +45,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 static int cap_interrupt_unset = false;
 static int cap_interrupt_level = false;
 static int cap_segstate;
-#ifdef KVM_CAP_PPC_BOOKE_SREGS
 static int cap_booke_sregs;
-#endif
 
 /* XXX We have a race condition where we actually have a level triggered
  *     interrupt, but the infrastructure can't expose that yet, so the guest
@@ -222,13 +220,13 @@ int kvm_arch_get_registers(CPUState *env)
     for (i = 0;i < 32; i++)
         env->gpr[i] = regs.gpr[i];
 
-#ifdef KVM_CAP_PPC_BOOKE_SREGS
     if (cap_booke_sregs) {
         ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
         if (ret < 0) {
             return ret;
         }
 
+#ifdef KVM_CAP_PPC_BOOKE_SREGS
         if (sregs.u.e.features & KVM_SREGS_E_BASE) {
             env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
             env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
@@ -325,16 +323,16 @@ int kvm_arch_get_registers(CPUState *env)
                 env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
             }
         }
-    }
 #endif
+    }
 
-#ifdef KVM_CAP_PPC_SEGSTATE
     if (cap_segstate) {
         ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
         if (ret < 0) {
             return ret;
         }
 
+#ifdef KVM_CAP_PPC_SEGSTATE
         ppc_store_sdr1(env, sregs.u.s.sdr1);
 
         /* Sync SLB */
@@ -357,8 +355,8 @@ int kvm_arch_get_registers(CPUState *env)
             env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
             env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
         }
-    }
 #endif
+    }
 
     return 0;
 }

target-ppc/translate_init.c

@@ -73,7 +73,7 @@ static void spr_read_generic (void *opaque, int gprn, int sprn)
     gen_load_spr(cpu_gpr[gprn], sprn);
 #ifdef PPC_DUMP_SPR_ACCESSES
     {
-        TCGv t0 = tcg_const_i32(sprn);
+        TCGv_i32 t0 = tcg_const_i32(sprn);
         gen_helper_load_dump_spr(t0);
         tcg_temp_free_i32(t0);
     }
@@ -85,7 +85,7 @@ static void spr_write_generic (void *opaque, int sprn, int gprn)
     gen_store_spr(sprn, cpu_gpr[gprn]);
 #ifdef PPC_DUMP_SPR_ACCESSES
     {
-        TCGv t0 = tcg_const_i32(sprn);
+        TCGv_i32 t0 = tcg_const_i32(sprn);
         gen_helper_store_dump_spr(t0);
         tcg_temp_free_i32(t0);
     }
@@ -1367,16 +1367,16 @@ static void spr_write_e500_l1csr0 (void *opaque, int sprn, int gprn)
 
 static void spr_write_booke206_mmucsr0 (void *opaque, int sprn, int gprn)
 {
-    TCGv t0 = tcg_const_i32(sprn);
+    TCGv_i32 t0 = tcg_const_i32(sprn);
     gen_helper_booke206_tlbflush(t0);
-    tcg_temp_free(t0);
+    tcg_temp_free_i32(t0);
 }
 
 static void spr_write_booke_pid (void *opaque, int sprn, int gprn)
 {
-    TCGv t0 = tcg_const_i32(sprn);
+    TCGv_i32 t0 = tcg_const_i32(sprn);
     gen_helper_booke_setpid(t0, cpu_gpr[gprn]);
-    tcg_temp_free(t0);
+    tcg_temp_free_i32(t0);
 }
 #endif