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Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf
* 'ppc-next' of git://repo.or.cz/qemu/agraf: PPC: fix mpc8544ds pci default devices Fix segfault on screendump with -nographic PPC: install mpc8544ds.dtb PPC: fix sregs usage on booke ppc: Fix compilation for ppc64-softmmu
This commit is contained in:
commit
594caf07ce
5 changed files with 13 additions and 14 deletions
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@ -45,9 +45,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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static int cap_interrupt_unset = false;
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static int cap_interrupt_level = false;
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static int cap_segstate;
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#ifdef KVM_CAP_PPC_BOOKE_SREGS
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static int cap_booke_sregs;
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#endif
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/* XXX We have a race condition where we actually have a level triggered
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* interrupt, but the infrastructure can't expose that yet, so the guest
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@ -222,13 +220,13 @@ int kvm_arch_get_registers(CPUState *env)
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for (i = 0;i < 32; i++)
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env->gpr[i] = regs.gpr[i];
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#ifdef KVM_CAP_PPC_BOOKE_SREGS
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if (cap_booke_sregs) {
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ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
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if (ret < 0) {
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return ret;
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}
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#ifdef KVM_CAP_PPC_BOOKE_SREGS
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if (sregs.u.e.features & KVM_SREGS_E_BASE) {
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env->spr[SPR_BOOKE_CSRR0] = sregs.u.e.csrr0;
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env->spr[SPR_BOOKE_CSRR1] = sregs.u.e.csrr1;
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@ -325,16 +323,16 @@ int kvm_arch_get_registers(CPUState *env)
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env->spr[SPR_BOOKE_PID2] = sregs.u.e.impl.fsl.pid2;
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}
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}
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}
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#endif
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}
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#ifdef KVM_CAP_PPC_SEGSTATE
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if (cap_segstate) {
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ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
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if (ret < 0) {
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return ret;
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}
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#ifdef KVM_CAP_PPC_SEGSTATE
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ppc_store_sdr1(env, sregs.u.s.sdr1);
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/* Sync SLB */
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@ -357,8 +355,8 @@ int kvm_arch_get_registers(CPUState *env)
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env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff;
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env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32;
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}
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}
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#endif
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}
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return 0;
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}
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@ -73,7 +73,7 @@ static void spr_read_generic (void *opaque, int gprn, int sprn)
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gen_load_spr(cpu_gpr[gprn], sprn);
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#ifdef PPC_DUMP_SPR_ACCESSES
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{
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TCGv t0 = tcg_const_i32(sprn);
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TCGv_i32 t0 = tcg_const_i32(sprn);
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gen_helper_load_dump_spr(t0);
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tcg_temp_free_i32(t0);
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}
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@ -85,7 +85,7 @@ static void spr_write_generic (void *opaque, int sprn, int gprn)
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gen_store_spr(sprn, cpu_gpr[gprn]);
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#ifdef PPC_DUMP_SPR_ACCESSES
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{
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TCGv t0 = tcg_const_i32(sprn);
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TCGv_i32 t0 = tcg_const_i32(sprn);
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gen_helper_store_dump_spr(t0);
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tcg_temp_free_i32(t0);
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}
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@ -1367,16 +1367,16 @@ static void spr_write_e500_l1csr0 (void *opaque, int sprn, int gprn)
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static void spr_write_booke206_mmucsr0 (void *opaque, int sprn, int gprn)
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{
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TCGv t0 = tcg_const_i32(sprn);
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TCGv_i32 t0 = tcg_const_i32(sprn);
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gen_helper_booke206_tlbflush(t0);
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tcg_temp_free(t0);
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tcg_temp_free_i32(t0);
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}
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static void spr_write_booke_pid (void *opaque, int sprn, int gprn)
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{
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TCGv t0 = tcg_const_i32(sprn);
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TCGv_i32 t0 = tcg_const_i32(sprn);
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gen_helper_booke_setpid(t0, cpu_gpr[gprn]);
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tcg_temp_free(t0);
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tcg_temp_free_i32(t0);
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}
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#endif
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