target/riscv: rvv-1.0: remove amo operations instructions

Vector AMOs are removed from standard vector extensions. Will be added
later as separate Zvamo extension, but will need a different encoding
from earlier proposal.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-19-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2021-12-10 15:56:04 +08:00 committed by Alistair Francis
parent 9b4a40a786
commit 57a2d89a82
4 changed files with 0 additions and 316 deletions

View file

@ -103,11 +103,6 @@ static inline int32_t vext_lmul(uint32_t desc)
return sextract32(FIELD_EX32(simd_data(desc), VDATA, LMUL), 0, 3);
}
static uint32_t vext_wd(uint32_t desc)
{
return FIELD_EX32(simd_data(desc), VDATA, WD);
}
/*
* Get vector group length in bytes. Its range is [64, 2048].
*
@ -633,38 +628,12 @@ GEN_VEXT_LDFF(vlhuff_v_d, uint16_t, uint64_t, ldhu_d)
GEN_VEXT_LDFF(vlwuff_v_w, uint32_t, uint32_t, ldwu_w)
GEN_VEXT_LDFF(vlwuff_v_d, uint32_t, uint64_t, ldwu_d)
/*
*** Vector AMO Operations (Zvamo)
*/
typedef void vext_amo_noatomic_fn(void *vs3, target_ulong addr,
uint32_t wd, uint32_t idx, CPURISCVState *env,
uintptr_t retaddr);
/* no atomic opreation for vector atomic insructions */
#define DO_SWAP(N, M) (M)
#define DO_AND(N, M) (N & M)
#define DO_XOR(N, M) (N ^ M)
#define DO_OR(N, M) (N | M)
#define DO_ADD(N, M) (N + M)
#define GEN_VEXT_AMO_NOATOMIC_OP(NAME, ESZ, MSZ, H, DO_OP, SUF) \
static void \
vext_##NAME##_noatomic_op(void *vs3, target_ulong addr, \
uint32_t wd, uint32_t idx, \
CPURISCVState *env, uintptr_t retaddr)\
{ \
typedef int##ESZ##_t ETYPE; \
typedef int##MSZ##_t MTYPE; \
typedef uint##MSZ##_t UMTYPE __attribute__((unused)); \
ETYPE *pe3 = (ETYPE *)vs3 + H(idx); \
MTYPE a = cpu_ld##SUF##_data(env, addr), b = *pe3; \
\
cpu_st##SUF##_data(env, addr, DO_OP(a, b)); \
if (wd) { \
*pe3 = a; \
} \
}
/* Signed min/max */
#define DO_MAX(N, M) ((N) >= (M) ? (N) : (M))
#define DO_MIN(N, M) ((N) >= (M) ? (M) : (N))
@ -673,100 +642,6 @@ vext_##NAME##_noatomic_op(void *vs3, target_ulong addr, \
#define DO_MAXU(N, M) DO_MAX((UMTYPE)N, (UMTYPE)M)
#define DO_MINU(N, M) DO_MIN((UMTYPE)N, (UMTYPE)M)
GEN_VEXT_AMO_NOATOMIC_OP(vamoswapw_v_w, 32, 32, H4, DO_SWAP, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoaddw_v_w, 32, 32, H4, DO_ADD, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoxorw_v_w, 32, 32, H4, DO_XOR, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoandw_v_w, 32, 32, H4, DO_AND, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoorw_v_w, 32, 32, H4, DO_OR, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamominw_v_w, 32, 32, H4, DO_MIN, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxw_v_w, 32, 32, H4, DO_MAX, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamominuw_v_w, 32, 32, H4, DO_MINU, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxuw_v_w, 32, 32, H4, DO_MAXU, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoswapw_v_d, 64, 32, H8, DO_SWAP, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoswapd_v_d, 64, 64, H8, DO_SWAP, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamoaddw_v_d, 64, 32, H8, DO_ADD, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoaddd_v_d, 64, 64, H8, DO_ADD, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamoxorw_v_d, 64, 32, H8, DO_XOR, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoxord_v_d, 64, 64, H8, DO_XOR, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamoandw_v_d, 64, 32, H8, DO_AND, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoandd_v_d, 64, 64, H8, DO_AND, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamoorw_v_d, 64, 32, H8, DO_OR, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamoord_v_d, 64, 64, H8, DO_OR, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamominw_v_d, 64, 32, H8, DO_MIN, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamomind_v_d, 64, 64, H8, DO_MIN, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxw_v_d, 64, 32, H8, DO_MAX, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxd_v_d, 64, 64, H8, DO_MAX, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamominuw_v_d, 64, 32, H8, DO_MINU, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamominud_v_d, 64, 64, H8, DO_MINU, q)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxuw_v_d, 64, 32, H8, DO_MAXU, l)
GEN_VEXT_AMO_NOATOMIC_OP(vamomaxud_v_d, 64, 64, H8, DO_MAXU, q)
static inline void
vext_amo_noatomic(void *vs3, void *v0, target_ulong base,
void *vs2, CPURISCVState *env, uint32_t desc,
vext_get_index_addr get_index_addr,
vext_amo_noatomic_fn *noatomic_op,
uint32_t esz, uint32_t msz, uintptr_t ra)
{
uint32_t i;
target_long addr;
uint32_t wd = vext_wd(desc);
uint32_t vm = vext_vm(desc);
for (i = 0; i < env->vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
continue;
}
probe_pages(env, get_index_addr(base, i, vs2), msz, ra, MMU_DATA_LOAD);
probe_pages(env, get_index_addr(base, i, vs2), msz, ra, MMU_DATA_STORE);
}
for (i = 0; i < env->vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
continue;
}
addr = get_index_addr(base, i, vs2);
noatomic_op(vs3, addr, wd, i, env, ra);
}
}
#define GEN_VEXT_AMO(NAME, MTYPE, ETYPE, INDEX_FN) \
void HELPER(NAME)(void *vs3, void *v0, target_ulong base, \
void *vs2, CPURISCVState *env, uint32_t desc) \
{ \
vext_amo_noatomic(vs3, v0, base, vs2, env, desc, \
INDEX_FN, vext_##NAME##_noatomic_op, \
sizeof(ETYPE), sizeof(MTYPE), \
GETPC()); \
}
GEN_VEXT_AMO(vamoswapw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoswapd_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoaddw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoaddd_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoxorw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoxord_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoandw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoandd_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoorw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamoord_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamominw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamomind_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamomaxw_v_d, int32_t, int64_t, idx_d)
GEN_VEXT_AMO(vamomaxd_v_d, int64_t, int64_t, idx_d)
GEN_VEXT_AMO(vamominuw_v_d, uint32_t, uint64_t, idx_d)
GEN_VEXT_AMO(vamominud_v_d, uint64_t, uint64_t, idx_d)
GEN_VEXT_AMO(vamomaxuw_v_d, uint32_t, uint64_t, idx_d)
GEN_VEXT_AMO(vamomaxud_v_d, uint64_t, uint64_t, idx_d)
GEN_VEXT_AMO(vamoswapw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamoaddw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamoxorw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamoandw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamoorw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamominw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamomaxw_v_w, int32_t, int32_t, idx_w)
GEN_VEXT_AMO(vamominuw_v_w, uint32_t, uint32_t, idx_w)
GEN_VEXT_AMO(vamomaxuw_v_w, uint32_t, uint32_t, idx_w)
/*
*** Vector Integer Arithmetic Instructions
*/