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virtio,pc,pci: features, cleanups, fixes
vhost-user-snd support x2APIC mode with TCG support CXL update to r3.1 fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmXMoXUPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpFtMIAKUKD0hzJrwOyPo4xsRUMbsB3ehIsJsMKfOK w+JWzTaojAG8ENPelWBdL2sEIs5U73VOchjLqHbH2m5sz6GJ13214amvdU/fYc8+ /dU2ZKoAmaR5L1ovKO/fq07y/J6DrITZ5tosy2i84Xa8EnsL4j3wEPNVWsDi7dna mvXUICSOOoJQ4O2YhSruKCQ8qIgF1/0Oi3u/rcrW3alSs8VQlrtQXxl6k+LbYqek +Fytco3jMRHPvQ+GYUIwGuHjN15ghArcvbsV0GIa+24BPY5h7YbDYGbfasePT5OK zDz51jitkoyDrQr+OzwOEe/X5+dVGhayRXfMtU5Qm53IE3y61qc= =K4b1 -----END PGP SIGNATURE----- Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging virtio,pc,pci: features, cleanups, fixes vhost-user-snd support x2APIC mode with TCG support CXL update to r3.1 fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmXMoXUPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpFtMIAKUKD0hzJrwOyPo4xsRUMbsB3ehIsJsMKfOK # w+JWzTaojAG8ENPelWBdL2sEIs5U73VOchjLqHbH2m5sz6GJ13214amvdU/fYc8+ # /dU2ZKoAmaR5L1ovKO/fq07y/J6DrITZ5tosy2i84Xa8EnsL4j3wEPNVWsDi7dna # mvXUICSOOoJQ4O2YhSruKCQ8qIgF1/0Oi3u/rcrW3alSs8VQlrtQXxl6k+LbYqek # +Fytco3jMRHPvQ+GYUIwGuHjN15ghArcvbsV0GIa+24BPY5h7YbDYGbfasePT5OK # zDz51jitkoyDrQr+OzwOEe/X5+dVGhayRXfMtU5Qm53IE3y61qc= # =K4b1 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 14 Feb 2024 11:18:13 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (60 commits) MAINTAINERS: Switch to my Enfabrica email virtio-gpu-rutabaga.c: override resource_destroy method virtio-gpu.c: add resource_destroy class method hw/display/virtio-gpu.c: use reset_bh class method hw/smbios: Fix port connector option validation hw/smbios: Fix OEM strings table option validation virtio-gpu: Correct virgl_renderer_resource_get_info() error check hw/cxl: Standardize all references on CXL r3.1 and minor updates hw/cxl: Update mailbox status registers. hw/cxl: Update RAS Capability Definitions for version 3. hw/cxl: Update link register definitions. hw/cxl: Update HDM Decoder capability to version 3 tests/acpi: Update DSDT.cxl to reflect change _STA return value. hw/i386: Fix _STA return value for ACPI0017 tests/acpi: Allow update of DSDT.cxl hw/mem/cxl_type3: Fix potential divide by zero reported by coverity hw/cxl: Pass NULL for a NULL MemoryRegionOps hw/cxl: Pass CXLComponentState to cache_mem_ops hw/cxl/device: read from register values in mdev_reg_read() hw/cxl/mbox: Remove dead code ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
5767815218
84 changed files with 2004 additions and 1910 deletions
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@ -15,6 +15,9 @@
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#include "qemu/osdep.h"
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#include "hw/isa/vt82c686.h"
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#include "hw/block/fdc.h"
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#include "hw/char/parallel-isa.h"
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#include "hw/char/serial.h"
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#include "hw/pci/pci.h"
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#include "hw/qdev-properties.h"
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#include "hw/ide/pci.h"
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@ -323,6 +326,17 @@ static uint64_t via_superio_cfg_read(void *opaque, hwaddr addr, unsigned size)
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return val;
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}
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static void via_superio_devices_enable(ViaSuperIOState *s, uint8_t data)
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{
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ISASuperIOClass *ic = ISA_SUPERIO_GET_CLASS(s);
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isa_parallel_set_enabled(s->superio.parallel[0], (data & 0x3) != 3);
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for (int i = 0; i < ic->serial.count; i++) {
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isa_serial_set_enabled(s->superio.serial[i], data & BIT(i + 2));
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}
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isa_fdc_set_enabled(s->superio.floppy, data & BIT(4));
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}
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static void via_superio_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -368,7 +382,25 @@ static void vt82c686b_superio_cfg_write(void *opaque, hwaddr addr,
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case 0xfd ... 0xff:
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/* ignore write to read only registers */
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return;
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/* case 0xe6 ... 0xe8: Should set base port of parallel and serial */
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case 0xe2:
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data &= 0x1f;
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via_superio_devices_enable(sc, data);
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break;
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case 0xe3:
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data &= 0xfc;
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isa_fdc_set_iobase(sc->superio.floppy, data << 2);
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break;
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case 0xe6:
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isa_parallel_set_iobase(sc->superio.parallel[0], data << 2);
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break;
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case 0xe7:
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data &= 0xfe;
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isa_serial_set_iobase(sc->superio.serial[0], data << 2);
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break;
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case 0xe8:
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data &= 0xfe;
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isa_serial_set_iobase(sc->superio.serial[1], data << 2);
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break;
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default:
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qemu_log_mask(LOG_UNIMP,
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"via_superio_cfg: unimplemented register 0x%x\n", idx);
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@ -395,9 +427,14 @@ static void vt82c686b_superio_reset(DeviceState *dev)
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/* Device ID */
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vt82c686b_superio_cfg_write(s, 0, 0xe0, 1);
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vt82c686b_superio_cfg_write(s, 1, 0x3c, 1);
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/* Function select - all disabled */
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/*
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* Function select - only serial enabled
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* Fuloong 2e's rescue-yl prints to the serial console w/o enabling it. This
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* suggests that the serial ports are enabled by default, so override the
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* datasheet.
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*/
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vt82c686b_superio_cfg_write(s, 0, 0xe2, 1);
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vt82c686b_superio_cfg_write(s, 1, 0x03, 1);
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vt82c686b_superio_cfg_write(s, 1, 0x0f, 1);
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/* Floppy ctrl base addr 0x3f0-7 */
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vt82c686b_superio_cfg_write(s, 0, 0xe3, 1);
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vt82c686b_superio_cfg_write(s, 1, 0xfc, 1);
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@ -465,6 +502,21 @@ static void vt8231_superio_cfg_write(void *opaque, hwaddr addr,
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case 0xfd:
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/* ignore write to read only registers */
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return;
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case 0xf2:
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data &= 0x17;
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via_superio_devices_enable(sc, data);
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break;
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case 0xf4:
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data &= 0xfe;
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isa_serial_set_iobase(sc->superio.serial[0], data << 2);
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break;
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case 0xf6:
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isa_parallel_set_iobase(sc->superio.parallel[0], data << 2);
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break;
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case 0xf7:
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data &= 0xfc;
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isa_fdc_set_iobase(sc->superio.floppy, data << 2);
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break;
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default:
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qemu_log_mask(LOG_UNIMP,
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"via_superio_cfg: unimplemented register 0x%x\n", idx);
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@ -513,12 +565,6 @@ static void vt8231_superio_init(Object *obj)
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VIA_SUPERIO(obj)->io_ops = &vt8231_superio_cfg_ops;
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}
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static uint16_t vt8231_superio_serial_iobase(ISASuperIODevice *sio,
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uint8_t index)
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{
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return 0x2f8; /* FIXME: This should be settable via registers f2-f4 */
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}
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static void vt8231_superio_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -526,7 +572,6 @@ static void vt8231_superio_class_init(ObjectClass *klass, void *data)
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dc->reset = vt8231_superio_reset;
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sc->serial.count = 1;
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sc->serial.get_iobase = vt8231_superio_serial_iobase;
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sc->parallel.count = 1;
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sc->ide.count = 0; /* emulated by via-ide */
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sc->floppy.count = 1;
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