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target/cris: Make cris_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient for cris linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. This makes all of the code in helper.c sysemu only, so remove the ifdefs and move the file to cris_softmmu_ss. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
9b12b6b442
commit
5753605412
5 changed files with 11 additions and 36 deletions
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@ -37,16 +37,6 @@ void cpu_loop(CPUCRISState *env)
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process_queued_cpu_work(cs);
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process_queued_cpu_work(cs);
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switch (trapnr) {
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switch (trapnr) {
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case 0xaa:
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{
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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/* XXX: check env->error_code */
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info.si_code = TARGET_SEGV_MAPERR;
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info._sifields._sigfault._addr = env->pregs[PR_EDA];
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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}
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break;
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case EXCP_INTERRUPT:
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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/* just indicate that signals should be handled asap */
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break;
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break;
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@ -205,9 +205,9 @@ static const struct SysemuCPUOps cris_sysemu_ops = {
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static const struct TCGCPUOps crisv10_tcg_ops = {
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static const struct TCGCPUOps crisv10_tcg_ops = {
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.initialize = cris_initialize_crisv10_tcg,
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.initialize = cris_initialize_crisv10_tcg,
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.tlb_fill = cris_cpu_tlb_fill,
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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.tlb_fill = cris_cpu_tlb_fill,
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.cpu_exec_interrupt = cris_cpu_exec_interrupt,
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.cpu_exec_interrupt = cris_cpu_exec_interrupt,
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.do_interrupt = crisv10_cpu_do_interrupt,
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.do_interrupt = crisv10_cpu_do_interrupt,
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#endif /* !CONFIG_USER_ONLY */
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#endif /* !CONFIG_USER_ONLY */
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@ -215,9 +215,9 @@ static const struct TCGCPUOps crisv10_tcg_ops = {
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static const struct TCGCPUOps crisv32_tcg_ops = {
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static const struct TCGCPUOps crisv32_tcg_ops = {
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.initialize = cris_initialize_tcg,
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.initialize = cris_initialize_tcg,
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.tlb_fill = cris_cpu_tlb_fill,
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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.tlb_fill = cris_cpu_tlb_fill,
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.cpu_exec_interrupt = cris_cpu_exec_interrupt,
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.cpu_exec_interrupt = cris_cpu_exec_interrupt,
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.do_interrupt = cris_cpu_do_interrupt,
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.do_interrupt = cris_cpu_do_interrupt,
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#endif /* !CONFIG_USER_ONLY */
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#endif /* !CONFIG_USER_ONLY */
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@ -189,6 +189,10 @@ extern const VMStateDescription vmstate_cris_cpu;
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void cris_cpu_do_interrupt(CPUState *cpu);
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void cris_cpu_do_interrupt(CPUState *cpu);
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void crisv10_cpu_do_interrupt(CPUState *cpu);
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void crisv10_cpu_do_interrupt(CPUState *cpu);
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bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
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bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
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bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#endif
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#endif
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void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
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void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
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@ -251,10 +255,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
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return !!(env->pregs[PR_CCS] & U_FLAG);
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return !!(env->pregs[PR_CCS] & U_FLAG);
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}
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}
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bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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/* Support function regs. */
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/* Support function regs. */
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#define SFR_RW_GC_CFG 0][0
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#define SFR_RW_GC_CFG 0][0
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#define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
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#define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
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@ -39,22 +39,6 @@
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#define D_LOG(...) do { } while (0)
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#define D_LOG(...) do { } while (0)
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#endif
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#endif
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#if defined(CONFIG_USER_ONLY)
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bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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CRISCPU *cpu = CRIS_CPU(cs);
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cs->exception_index = 0xaa;
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cpu->env.pregs[PR_EDA] = address;
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cpu_loop_exit_restore(cs, retaddr);
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}
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#else /* !CONFIG_USER_ONLY */
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static void cris_shift_ccs(CPUCRISState *env)
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static void cris_shift_ccs(CPUCRISState *env)
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{
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{
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uint32_t ccs;
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uint32_t ccs;
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@ -304,5 +288,3 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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return ret;
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return ret;
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}
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}
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#endif /* !CONFIG_USER_ONLY */
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@ -2,13 +2,16 @@ cris_ss = ss.source_set()
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cris_ss.add(files(
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cris_ss.add(files(
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'cpu.c',
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'cpu.c',
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'gdbstub.c',
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'gdbstub.c',
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'helper.c',
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'op_helper.c',
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'op_helper.c',
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'translate.c',
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'translate.c',
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))
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))
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cris_softmmu_ss = ss.source_set()
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cris_softmmu_ss = ss.source_set()
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cris_softmmu_ss.add(files('mmu.c', 'machine.c'))
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cris_softmmu_ss.add(files(
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'helper.c',
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'machine.c',
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'mmu.c',
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))
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target_arch += {'cris': cris_ss}
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target_arch += {'cris': cris_ss}
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target_softmmu_arch += {'cris': cris_softmmu_ss}
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target_softmmu_arch += {'cris': cris_softmmu_ss}
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