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hw/ppc: Add N1 chiplet model

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The N1 chiplet handle the high speed i/o traffic over PCIe and others.
The N1 chiplet consists of PowerBus Fabric controller,
nest Memory Management Unit, chiplet control unit and more.

This commit creates a N1 chiplet model and initialize and realize the
pervasive chiplet model where chiplet control registers are implemented.

This commit also implement the read/write method for the powerbus scom
registers

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Chalapathi V 2024-01-23 16:37:02 +10:00 • committed by Nicholas Piggin
parent 1adf24708b
commit 5706b0064d
4 changed files with 212 additions and 0 deletions
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32
include/hw/ppc/pnv_n1_chiplet.h Normal file
View file

@ -0,0 +1,32 @@
/*
* QEMU PowerPC N1 chiplet model
*
* Copyright (c) 2023, IBM Corporation.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef PPC_PNV_N1_CHIPLET_H
#define PPC_PNV_N1_CHIPLET_H
#include "hw/ppc/pnv_nest_pervasive.h"
#define TYPE_PNV_N1_CHIPLET "pnv-N1-chiplet"
#define PNV_N1_CHIPLET(obj) OBJECT_CHECK(PnvN1Chiplet, (obj), TYPE_PNV_N1_CHIPLET)
typedef struct PnvPbScom {
uint64_t mode;
uint64_t hp_mode2_curr;
} PnvPbScom;
typedef struct PnvN1Chiplet {
DeviceState parent;
MemoryRegion xscom_pb_eq_mr;
MemoryRegion xscom_pb_es_mr;
PnvNestChipletPervasive nest_pervasive; /* common pervasive chiplet unit */
#define PNV_PB_SCOM_EQ_SIZE 8
PnvPbScom eq[PNV_PB_SCOM_EQ_SIZE];
#define PNV_PB_SCOM_ES_SIZE 4
PnvPbScom es[PNV_PB_SCOM_ES_SIZE];
} PnvN1Chiplet;
#endif /*PPC_PNV_N1_CHIPLET_H */

6
include/hw/ppc/pnv_xscom.h
View file

@ -173,6 +173,12 @@ struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_N1_CHIPLET_CTRL_REGS_BASE 0x3000000
#define PNV10_XSCOM_CHIPLET_CTRL_REGS_SIZE 0x400
#define PNV10_XSCOM_N1_PB_SCOM_EQ_BASE 0x3011000
#define PNV10_XSCOM_N1_PB_SCOM_EQ_SIZE 0x200
#define PNV10_XSCOM_N1_PB_SCOM_ES_BASE 0x3011300
#define PNV10_XSCOM_N1_PB_SCOM_ES_SIZE 0x100
#define PNV10_XSCOM_PEC_NEST_BASE 0x3011800 /* index goes downwards ... */
#define PNV10_XSCOM_PEC_NEST_SIZE 0x100