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cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
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1b1ed8dc40
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55e5c28502
40 changed files with 153 additions and 102 deletions
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@ -10005,8 +10005,10 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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return 0;
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}
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static int ppc_fixup_cpu(CPUPPCState *env)
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static int ppc_fixup_cpu(PowerPCCPU *cpu)
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{
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CPUPPCState *env = &cpu->env;
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/* TCG doesn't (yet) emulate some groups of instructions that
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* are implemented on some otherwise supported CPUs (e.g. VSX
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* and decimal floating point instructions on POWER7). We
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@ -10036,12 +10038,12 @@ static void ppc_cpu_realize(Object *obj, Error **errp)
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Error *local_err = NULL;
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if (kvm_enabled()) {
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if (kvmppc_fixup_cpu(env) != 0) {
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if (kvmppc_fixup_cpu(cpu) != 0) {
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error_setg(errp, "Unable to virtualize selected CPU with KVM");
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return;
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}
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} else {
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if (ppc_fixup_cpu(env) != 0) {
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if (ppc_fixup_cpu(cpu) != 0) {
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error_setg(errp, "Unable to emulate selected CPU with TCG");
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return;
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}
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@ -10460,7 +10462,7 @@ static void ppc_cpu_reset(CPUState *s)
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target_ulong msr;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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qemu_log("CPU Reset (CPU %d)\n", s->cpu_index);
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log_cpu_state(env, 0);
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}
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