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cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
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1b1ed8dc40
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55e5c28502
40 changed files with 153 additions and 102 deletions
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@ -1936,7 +1936,7 @@ static void x86_cpu_reset(CPUState *s)
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int i;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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qemu_log("CPU Reset (CPU %d)\n", s->cpu_index);
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log_cpu_state(env, CPU_DUMP_FPU | CPU_DUMP_CCOP);
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}
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@ -2010,7 +2010,7 @@ static void x86_cpu_reset(CPUState *s)
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#if !defined(CONFIG_USER_ONLY)
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/* We hard-wire the BSP to the first CPU. */
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if (env->cpu_index == 0) {
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if (s->cpu_index == 0) {
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apic_designate_bsp(env->apic_state);
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}
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@ -2148,6 +2148,7 @@ void x86_cpu_realize(Object *obj, Error **errp)
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static void x86_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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X86CPU *cpu = X86_CPU(obj);
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CPUX86State *env = &cpu->env;
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static int inited;
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@ -2179,7 +2180,7 @@ static void x86_cpu_initfn(Object *obj)
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x86_cpuid_get_tsc_freq,
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x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
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env->cpuid_apic_id = env->cpu_index;
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env->cpuid_apic_id = cs->cpu_index;
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/* init various static tables used in TCG mode */
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if (tcg_enabled() && !inited) {
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