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tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE
Add support for MMU protection regions that are smaller than TARGET_PAGE_SIZE. We do this by marking the TLB entry for those pages with a flag TLB_RECHECK. This flag causes us to always take the slow-path for accesses. In the slow path we can then special case them to always call tlb_fill() again, so we have the correct information for the exact address being accessed. This change allows us to handle reading and writing from small regions; we cannot deal with execution from the small region. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180620130619.11362-2-peter.maydell@linaro.org
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3 changed files with 130 additions and 30 deletions
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@ -330,11 +330,14 @@ CPUArchState *cpu_copy(CPUArchState *env);
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#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS - 2))
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/* Set if TLB entry is an IO callback. */
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#define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3))
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/* Set if TLB entry must have MMU lookup repeated for every access */
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#define TLB_RECHECK (1 << (TARGET_PAGE_BITS - 4))
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/* Use this mask to check interception with an alignment mask
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* in a TCG backend.
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*/
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#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO)
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#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
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| TLB_RECHECK)
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void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
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void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf);
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