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ppc patch queue for 2017-02-22
This pull request has: * Yet more POWER9 instruction implementations * Some extensions to the softfloat code which are necesssary for some of those instructions * Some preliminary patches in preparation for POWER9 softmmu implementation * Igor Mammedov's cleanups to unify hotplug cpu handling across architectures * Assorted bugfixes The softfloat and cpu hotplug changes aren't entirely ppc specific (in fact the hotplug stuff contains some pc specific patches). However they're included here because ppc is one of the main beneficiaries, and the series depend on some ppc specific patches. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJYrS/bAAoJEGw4ysog2bOSJ3MP/AjoTGTP5MHPwWBZKAxpEtie vEXudVbOelr3QV06vHMH4YHVAncuzt9Hmz/RDgs5Uynp4vLdmEo5IdiFP9PMjrFg oMAndku9icU8PG+XNF5pNrKy10n6k8dVRBR/19UxnRWMuxywOZO208WkICF/6kDK IpFT96MubqbReLcVhdl2N8d2rP7/lRQmz6aPxhRLFBuAe8iheAQLq/QeZLIZaWEJ i4mPWVu/CDYP9nMAgv56MW0yY5p2o5MCh+f80+7jvKXZBoeo83KOTaZeZbGb/byr rCfyLTR24tj6WUGRvzyB+FJ8rbWKcox4UCx17239gAjXtLxhlYaQDo28S5gwinpQ b/CaEgb8x2kl97tZT/M1mamr7PdFxachCA20oizguwFJ9oeukAPUvkVBpEtVYK8K a+VrRHxVJwSi/ZD3N6WRZMXR4D+Oc8DcXoEzMu4CFtIzQ/WJroZCa4JCcdv4N1nw 9u1m+C2QbQ9sGBtTSGCy0KZyT3sZHoFT6aD4zpkV7s3BJKk+AXSLRpL4z8FP2sDB Wh/Qk5q06P1pPZzvuU9QJmrpIE9EFcOQW4IQhyViut+BXzBlp7cWxeGcPM5PuJ7V 6FcMSchZeVOiLi9Y51csluDrecTKIQ3yFEgLW7j50Lg/WqmdwlwkcW39MzlWgjgQ OIoVgvGmGovPTGIIYyY9 =bsJJ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170222' into staging ppc patch queue for 2017-02-22 This pull request has: * Yet more POWER9 instruction implementations * Some extensions to the softfloat code which are necesssary for some of those instructions * Some preliminary patches in preparation for POWER9 softmmu implementation * Igor Mammedov's cleanups to unify hotplug cpu handling across architectures * Assorted bugfixes The softfloat and cpu hotplug changes aren't entirely ppc specific (in fact the hotplug stuff contains some pc specific patches). However they're included here because ppc is one of the main beneficiaries, and the series depend on some ppc specific patches. # gpg: Signature made Wed 22 Feb 2017 06:29:47 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.9-20170222: (43 commits) hw/ppc/ppc405_uc.c: Avoid integer overflows hw/ppc/spapr: Check for valid page size when hot plugging memory target-ppc: fix Book-E TLB matching hw/net/spapr_llan: 6 byte mac address device tree entry machine: replace query_hotpluggable_cpus() callback with has_hotpluggable_cpus flag machine: unify [pc_|spapr_]query_hotpluggable_cpus() callbacks spapr: reuse machine->possible_cpus instead of cores[] change CPUArchId.cpu type to Object* pc: pass apic_id to pc_find_cpu_slot() directly so lookup could be done without CPU object pc: calculate topology only once when possible_cpus is initialised pc: move pcms->possible_cpus init out of pc_cpus_init() machine: move possible_cpus to MachineState hw/pci-host/prep: Do not use hw_error() in realize function target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv target/ppc/POWER9: Adapt LPCR handling for POWER9 target/ppc/POWER9: Add ISAv3.00 MMU definition target/ppc: Fix LPCR DPFD mask define target-ppc: Add xscvqpudz and xscvqpuwz instructions target-ppc: Implement round to odd variants of quad FP instructions softfloat: Add float128_to_uint32_round_to_zero() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
5522924718
35 changed files with 1097 additions and 358 deletions
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@ -41,15 +41,20 @@ int machine_phandle_start(MachineState *machine);
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bool machine_dump_guest_core(MachineState *machine);
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bool machine_mem_merge(MachineState *machine);
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void machine_register_compat_props(MachineState *machine);
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HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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/**
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* CPUArchId:
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* @arch_id - architecture-dependent CPU ID of present or possible CPU
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* @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
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* @props - CPU object properties, initialized by board
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* #vcpus_count - number of threads provided by @cpu object
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*/
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typedef struct {
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uint64_t arch_id;
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struct CPUState *cpu;
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int64_t vcpus_count;
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CpuInstanceProperties props;
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Object *cpu;
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} CPUArchId;
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/**
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@ -82,10 +87,8 @@ typedef struct {
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* Returns an array of @CPUArchId architecture-dependent CPU IDs
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* which includes CPU IDs for present and possible to hotplug CPUs.
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* Caller is responsible for freeing returned list.
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* @query_hotpluggable_cpus:
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* Returns a @HotpluggableCPUList, which describes CPUs objects which
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* could be added with -device/device_add.
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* Caller is responsible for freeing returned list.
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* @has_hotpluggable_cpus:
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* If true, board supports CPUs creation with -device/device_add.
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* @minimum_page_bits:
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* If non-zero, the board promises never to create a CPU with a page size
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* smaller than this, so QEMU can use a more efficient larger page
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@ -131,12 +134,12 @@ struct MachineClass {
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bool option_rom_has_mr;
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bool rom_file_has_mr;
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int minimum_page_bits;
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bool has_hotpluggable_cpus;
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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unsigned (*cpu_index_to_socket_id)(unsigned cpu_index);
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const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
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HotpluggableCPUList *(*query_hotpluggable_cpus)(MachineState *machine);
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};
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/**
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@ -178,6 +181,7 @@ struct MachineState {
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char *initrd_filename;
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const char *cpu_model;
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AccelState *accelerator;
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CPUArchIdList *possible_cpus;
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};
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#define DEFINE_MACHINE(namestr, machine_initfn) \
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@ -73,7 +73,6 @@ struct PCMachineState {
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/* CPU and apic information: */
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bool apic_xrupt_override;
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unsigned apic_id_limit;
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CPUArchIdList *possible_cpus;
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uint16_t boot_cpus;
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/* NUMA information: */
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@ -94,7 +94,6 @@ struct sPAPRMachineState {
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/*< public >*/
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char *kvm_type;
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MemoryHotplugState hotplug_memory;
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Object **cores;
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};
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#define H_SUCCESS 0
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@ -34,12 +34,6 @@ typedef struct sPAPRCPUCoreClass {
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ObjectClass *cpu_class;
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} sPAPRCPUCoreClass;
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void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
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Error **errp);
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char *spapr_get_cpu_core_type(const char *model);
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void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
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Error **errp);
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void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
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Error **errp);
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void spapr_cpu_core_class_init(ObjectClass *oc, void *data);
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#endif
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