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target/riscv: Add support for the 32-bit MSTATUSH CSR

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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This commit is contained in:
Alistair Francis 2020-01-31 17:03:05 -08:00 • committed by Palmer Dabbelt
parent 3067553993
commit 551fa7e8a6
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6 changed files with 62 additions and 0 deletions
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25
target/riscv/csr.c
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@ -371,6 +371,27 @@ static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val)
return 0;
}
#ifdef TARGET_RISCV32
static int read_mstatush(CPURISCVState *env, int csrno, target_ulong *val)
{
*val = env->mstatush;
return 0;
}
static int write_mstatush(CPURISCVState *env, int csrno, target_ulong val)
{
if ((val ^ env->mstatush) & (MSTATUS_MPV)) {
tlb_flush(env_cpu(env));
}
val &= MSTATUS_MPV | MSTATUS_MTL;
env->mstatush = val;
return 0;
}
#endif
static int read_misa(CPURISCVState *env, int csrno, target_ulong *val)
{
*val = env->misa;
@ -1214,6 +1235,10 @@ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
[CSR_MTVEC] = { any, read_mtvec, write_mtvec },
[CSR_MCOUNTEREN] = { any, read_mcounteren, write_mcounteren },
#if defined(TARGET_RISCV32)
[CSR_MSTATUSH] = { any, read_mstatush, write_mstatush },
#endif
/* Legacy Counter Setup (priv v1.9.1) */
[CSR_MUCOUNTEREN] = { any, read_mucounteren, write_mucounteren },
[CSR_MSCOUNTEREN] = { any, read_mscounteren, write_mscounteren },