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hw/omap_i2c: Convert to qdev
Convert the omap_i2c device to qdev. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: Riku Voipio <riku.voipio@iki.fi> [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Juha Riihimäki
Peter Maydell
parent
ae7d54d489
commit
54e17933bf
5 changed files with 103 additions and 81 deletions
111
hw/omap_i2c.c
111
hw/omap_i2c.c
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@ -19,14 +19,20 @@
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#include "hw.h"
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#include "i2c.h"
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#include "omap.h"
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#include "sysbus.h"
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struct omap_i2c_s {
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typedef struct OMAPI2CState {
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SysBusDevice busdev;
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MemoryRegion iomem;
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qemu_irq irq;
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qemu_irq drq[2];
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i2c_bus *bus;
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uint8_t revision;
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void *iclk;
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void *fclk;
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uint8_t mask;
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uint16_t stat;
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uint16_t dma;
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@ -40,12 +46,12 @@ struct omap_i2c_s {
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uint8_t divider;
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uint8_t times[2];
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uint16_t test;
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};
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} OMAPI2CState;
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#define OMAP2_INTR_REV 0x34
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#define OMAP2_GC_REV 0x34
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static void omap_i2c_interrupts_update(struct omap_i2c_s *s)
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static void omap_i2c_interrupts_update(OMAPI2CState *s)
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{
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qemu_set_irq(s->irq, s->stat & s->mask);
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if ((s->dma >> 15) & 1) /* RDMA_EN */
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@ -54,7 +60,7 @@ static void omap_i2c_interrupts_update(struct omap_i2c_s *s)
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qemu_set_irq(s->drq[1], (s->stat >> 4) & 1); /* XRDY */
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}
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static void omap_i2c_fifo_run(struct omap_i2c_s *s)
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static void omap_i2c_fifo_run(OMAPI2CState *s)
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{
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int ack = 1;
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@ -122,8 +128,10 @@ static void omap_i2c_fifo_run(struct omap_i2c_s *s)
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s->control &= ~(1 << 1); /* STP */
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}
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void omap_i2c_reset(struct omap_i2c_s *s)
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static void omap_i2c_reset(DeviceState *dev)
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{
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OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState,
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sysbus_from_qdev(dev));
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s->mask = 0;
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s->stat = 0;
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s->dma = 0;
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@ -143,7 +151,7 @@ void omap_i2c_reset(struct omap_i2c_s *s)
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static uint32_t omap_i2c_read(void *opaque, target_phys_addr_t addr)
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *) opaque;
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OMAPI2CState *s = opaque;
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int offset = addr & OMAP_MPUI_REG_MASK;
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uint16_t ret;
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@ -243,7 +251,7 @@ static uint32_t omap_i2c_read(void *opaque, target_phys_addr_t addr)
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static void omap_i2c_write(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *) opaque;
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OMAPI2CState *s = opaque;
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int offset = addr & OMAP_MPUI_REG_MASK;
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int nack;
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@ -309,14 +317,14 @@ static void omap_i2c_write(void *opaque, target_phys_addr_t addr,
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}
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if (value & 2)
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omap_i2c_reset(s);
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omap_i2c_reset(&s->busdev.qdev);
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break;
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case 0x24: /* I2C_CON */
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s->control = value & 0xcf87;
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if (~value & (1 << 15)) { /* I2C_EN */
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if (s->revision < OMAP2_INTR_REV)
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omap_i2c_reset(s);
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omap_i2c_reset(&s->busdev.qdev);
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break;
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}
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if ((value & (1 << 15)) && !(value & (1 << 10))) { /* MST */
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@ -385,7 +393,7 @@ static void omap_i2c_write(void *opaque, target_phys_addr_t addr,
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static void omap_i2c_writeb(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *) opaque;
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OMAPI2CState *s = opaque;
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int offset = addr & OMAP_MPUI_REG_MASK;
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switch (offset) {
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@ -426,50 +434,59 @@ static const MemoryRegionOps omap_i2c_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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struct omap_i2c_s *omap_i2c_init(MemoryRegion *sysmem,
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target_phys_addr_t base,
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qemu_irq irq,
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qemu_irq *dma,
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omap_clk clk)
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static int omap_i2c_init(SysBusDevice *dev)
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *)
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g_malloc0(sizeof(struct omap_i2c_s));
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OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState, dev);
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/* TODO: set a value greater or equal to real hardware */
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s->revision = 0x11;
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s->irq = irq;
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s->drq[0] = dma[0];
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s->drq[1] = dma[1];
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s->bus = i2c_init_bus(NULL, "i2c");
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omap_i2c_reset(s);
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memory_region_init_io(&s->iomem, &omap_i2c_ops, s, "omap.i2c", 0x800);
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memory_region_add_subregion(sysmem, base, &s->iomem);
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return s;
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if (!s->fclk) {
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hw_error("omap_i2c: fclk not connected\n");
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}
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if (s->revision >= OMAP2_INTR_REV && !s->iclk) {
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/* Note that OMAP1 doesn't have a separate interface clock */
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hw_error("omap_i2c: iclk not connected\n");
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}
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(dev, &s->drq[0]);
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sysbus_init_irq(dev, &s->drq[1]);
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memory_region_init_io(&s->iomem, &omap_i2c_ops, s, "omap.i2c",
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(s->revision < OMAP2_INTR_REV) ? 0x800 : 0x1000);
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sysbus_init_mmio(dev, &s->iomem);
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s->bus = i2c_init_bus(&dev->qdev, NULL);
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return 0;
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}
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struct omap_i2c_s *omap2_i2c_init(struct omap_target_agent_s *ta,
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qemu_irq irq, qemu_irq *dma, omap_clk fclk, omap_clk iclk)
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static Property omap_i2c_properties[] = {
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DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0),
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DEFINE_PROP_PTR("iclk", OMAPI2CState, iclk),
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DEFINE_PROP_PTR("fclk", OMAPI2CState, fclk),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void omap_i2c_class_init(ObjectClass *klass, void *data)
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *)
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g_malloc0(sizeof(struct omap_i2c_s));
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s->revision = 0x34;
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s->irq = irq;
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s->drq[0] = dma[0];
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s->drq[1] = dma[1];
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s->bus = i2c_init_bus(NULL, "i2c");
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omap_i2c_reset(s);
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memory_region_init_io(&s->iomem, &omap_i2c_ops, s, "omap2.i2c",
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omap_l4_region_size(ta, 0));
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omap_l4_attach(ta, 0, &s->iomem);
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return s;
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = omap_i2c_init;
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dc->props = omap_i2c_properties;
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dc->reset = omap_i2c_reset;
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}
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i2c_bus *omap_i2c_bus(struct omap_i2c_s *s)
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static TypeInfo omap_i2c_info = {
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.name = "omap_i2c",
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(OMAPI2CState),
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.class_init = omap_i2c_class_init,
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};
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static void omap_i2c_register_types(void)
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{
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type_register_static(&omap_i2c_info);
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}
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i2c_bus *omap_i2c_bus(DeviceState *omap_i2c)
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{
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OMAPI2CState *s = FROM_SYSBUS(OMAPI2CState, sysbus_from_qdev(omap_i2c));
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return s->bus;
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}
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type_init(omap_i2c_register_types)
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