motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-08 10:13:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

qom: Put name parameter before value / visitor parameter

Browse source 
The object_property_set_FOO() setters take property name and value in
an unusual order:

    void object_property_set_FOO(Object *obj, FOO_TYPE value,
                                 const char *name, Error **errp)

Having to pass value before name feels grating.  Swap them.

Same for object_property_set(), object_property_get(), and
object_property_parse().

Convert callers with this Coccinelle script:

    @@
    identifier fun = {
        object_property_get, object_property_parse, object_property_set_str,
        object_property_set_link, object_property_set_bool,
        object_property_set_int, object_property_set_uint, object_property_set,
        object_property_set_qobject
    };
    expression obj, v, name, errp;
    @@
    -    fun(obj, v, name, errp)
    +    fun(obj, name, v, errp)

Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information".  Convert that one manually.

Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.

Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually.  The other files using RXCPU that way don't need
conversion.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
This commit is contained in:
Markus Armbruster 2020-07-07 18:05:54 +02:00
parent 1c94a35164
commit 5325cc34a2
138 changed files with 712 additions and 741 deletions
Download patch file Download diff file Expand all files Collapse all files

4
hw/riscv/opentitan.c
View file

@ -108,9 +108,9 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
MemoryRegion *sys_mem = get_system_memory();
Error *err = NULL;
object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type",
object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type,
&error_abort);
object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);

4
hw/riscv/sifive_e.c
View file

@ -175,7 +175,7 @@ static void sifive_e_soc_init(Object *obj)
SiFiveESoCState *s = RISCV_E_SOC(obj);
object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY);
object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus,
&error_abort);
object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio,
TYPE_SIFIVE_GPIO);
@ -190,7 +190,7 @@ static void sifive_e_soc_realize(DeviceState *dev, Error **errp)
SiFiveESoCState *s = RISCV_E_SOC(dev);
MemoryRegion *sys_mem = get_system_memory();
object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type",
object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);

6
hw/riscv/sifive_u.c
View file

@ -383,8 +383,8 @@ static void sifive_u_machine_init(MachineState *machine)
/* Initialize SoC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC);
object_property_set_uint(OBJECT(&s->soc), s->serial, "serial",
&error_abort);
object_property_set_uint(OBJECT(&s->soc), "serial", s->serial,
&error_abort);
qdev_realize(DEVICE(&s->soc), NULL, &error_abort);
/* register RAM */
@ -708,7 +708,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp)
qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
qdev_set_nic_properties(DEVICE(&s->gem), nd);
}
object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision",
object_property_set_int(OBJECT(&s->gem), "revision", GEM_REVISION,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gem), &err)) {
error_propagate(errp, err);

4
hw/riscv/spike.c
View file

@ -171,9 +171,9 @@ static void spike_board_init(MachineState *machine)
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc,
TYPE_RISCV_HART_ARRAY);
object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type,
&error_abort);
object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
object_property_set_int(OBJECT(&s->soc), "num-harts", smp_cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort);

4
hw/riscv/virt.c
View file

@ -487,9 +487,9 @@ static void virt_machine_init(MachineState *machine)
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc,
TYPE_RISCV_HART_ARRAY);
object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
object_property_set_str(OBJECT(&s->soc), "cpu-type", machine->cpu_type,
&error_abort);
object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts",
object_property_set_int(OBJECT(&s->soc), "num-harts", smp_cpus,
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort);