motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 10:34:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

tcg: Split out tcg_out_ext32s

Browse source 
We will need a backend interface for performing 32-bit sign-extend.
Use it in tcg_reg_alloc_op in the meantime.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-04-05 17:50:09 -07:00
parent 379afdff47
commit 52bf3398c3
11 changed files with 54 additions and 20 deletions
Download patch file Download diff file Expand all files Collapse all files

9
tcg/tci/tcg-target.c.inc
View file

@ -615,6 +615,13 @@ static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs)
}
}
static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rs)
{
tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
tcg_debug_assert(TCG_TARGET_HAS_ext32s_i64);
tcg_out_op_rr(s, INDEX_op_ext32s_i64, rd, rs);
}
static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
tcg_target_long imm)
{
@ -773,7 +780,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */
CASE_64(ext32s) /* Optional (TCG_TARGET_HAS_ext32s_i64). */
CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */
CASE_64(ext_i32)
CASE_64(extu_i32)
@ -857,6 +863,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext16s_i64:
case INDEX_op_ext16u_i32:
case INDEX_op_ext16u_i64:
case INDEX_op_ext32s_i64:
default:
g_assert_not_reached();
}