mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 15:53:54 -06:00
aspeed/smc: Inject errors in DMA checksum
Emulate read errors in the DMA Checksum Register for high frequencies and optimistic settings of the Read Timing Compensation Register. This will help in tuning the SPI timing calibration algorithm. Errors are only injected when the property "inject_failure" is set to true as suggested by Philippe. The values below are those to expect from the first flash device of the FMC controller of a palmetto-bmc machine. Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190904070506.1052-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
0d72c71702
commit
5258c2a69c
2 changed files with 37 additions and 0 deletions
|
@ -88,6 +88,7 @@ typedef struct AspeedSMCState {
|
|||
|
||||
uint32_t num_cs;
|
||||
qemu_irq *cs_lines;
|
||||
bool inject_failure;
|
||||
|
||||
SSIBus *spi;
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue