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https://github.com/Motorhead1991/qemu.git
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Pull request for various patches that have been reviewed and
laying on the mailing list for a while, but apparently no maintainer feels really responsible for picking up. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJaZcaYAAoJEC7Z13T+cC21ab0P/3fE52pp0BEWRfM3MkTyJCgs c3ZDR2raLsrwl5MMoeV6TCZ8ILp3RR5ipdnpsxAlUKi0e953hduFXJ/A9meElogu i1BdCl7SBYUWXg9WKqH5cX9LGiGiRLQ53KehCB6wa4nXBjkL1bGtbprbp5kCb+Sn tavBoIqkwxC2VvqJHL23uS7n/3bPkr4XA1bA/VWezm7be6f5bEqBzORdxPabRC3f M7b1ntl2Xj9PXpwKZkHgET8Wg1Ne5kCUvvx9o22iMuHhBHsxAmMc06Q96wihDUI3 /CwzaErGrykGRX95y++yaBMUEYMSk90dv9cXHTMryDw/0id0OMnpcGm6SeQHlcQT ATrhnH1VzEcgGJPYpqKxNvb0pJZ7t7gYUSi0HMC83PG2S9wD/kBvtB8rqumTolKB cvI6l7PFfCZIr3FsTyGHX1KVRHX8PWljnKIvAbyUEuK4XDnSX7hT+7jQvuxj4HSZ /ZlksnSIHcUf5gx6zG2StVKo5TEnY6JUhf8CuQeILW0ZGj6V/aUFbR5aMmgVinyj p/2OOUsze6rYCcpVE2kI7hSMrSXk4QfvPyIvjGf86EVxTM4SK03bP4QVFwtZtFzA HXXFIgKNcE7I7BhghC6PLcmHaYBiK8A5EIvXpgi4tD7L3PFLos6wtR6T2ze3mBn2 JyKxGw9rExlAJMi5/WE9 =JCAM -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth/tags/pull-request-2018-01-22' into staging Pull request for various patches that have been reviewed and laying on the mailing list for a while, but apparently no maintainer feels really responsible for picking up. # gpg: Signature made Mon 22 Jan 2018 11:10:16 GMT # gpg: using RSA key 0x2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" # gpg: aka "Thomas Huth <thuth@redhat.com>" # gpg: aka "Thomas Huth <huth@tuxfamily.org>" # gpg: aka "Thomas Huth <th.huth@posteo.de>" # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth/tags/pull-request-2018-01-22: hw/isa: Replace fprintf(stderr, "*\n" with error_report() hw/ipmi: Replace fprintf(stderr, "*\n" with error_report() hw/bt: Replace fprintf(stderr, "*\n" with error_report() Fixes after renaming __FUNCTION__ to __func__ Replace all occurances of __FUNCTION__ with __func__ tests/cpu-plug-test: Test CPU hot-plugging on s390x tests/cpu-plug-test: Check CPU hot-plugging on ppc64, too tests/cpu-plug-test: Check the CPU hot-plugging with device_add, too tests: Rename pc-cpu-test.c to cpu-plug-test.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
52483b067c
68 changed files with 580 additions and 448 deletions
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@ -474,7 +474,7 @@ static uint16_t blizzard_reg_read(void *opaque, uint8_t reg)
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return s->gpio_pdown;
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default:
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fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
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fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
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return 0;
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}
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}
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@ -502,7 +502,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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s->pll_mode = value & 0x77;
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if ((value & 3) == 0 || (value & 3) == 3)
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fprintf(stderr, "%s: wrong PLL Control bits (%i)\n",
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__FUNCTION__, value & 3);
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__func__, value & 3);
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break;
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case 0x0e: /* Clock-Source Select */
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@ -541,7 +541,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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case 0x28: /* LCD Panel Configuration */
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s->lcd_config = value & 0xff;
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if (value & (1 << 7))
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fprintf(stderr, "%s: data swap not supported!\n", __FUNCTION__);
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fprintf(stderr, "%s: data swap not supported!\n", __func__);
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break;
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case 0x2a: /* LCD Horizontal Display Width */
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@ -586,7 +586,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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s->hssi_config[1] = value;
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if (((value >> 4) & 3) == 3)
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fprintf(stderr, "%s: Illegal active-data-links value\n",
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__FUNCTION__);
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__func__);
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break;
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case 0x42: /* High-speed Serial Interface Tx Mode */
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s->hssi_config[2] = value & 0xbd;
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@ -641,7 +641,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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s->enable = value & 1;
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s->blank = (value >> 1) & 1;
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if (value & (1 << 4))
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fprintf(stderr, "%s: Macrovision enable attempt!\n", __FUNCTION__);
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fprintf(stderr, "%s: Macrovision enable attempt!\n", __func__);
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break;
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case 0x6a: /* Special Effects */
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@ -718,7 +718,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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s->bpp = blizzard_iformat_bpp[s->iformat];
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if (!s->bpp)
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fprintf(stderr, "%s: Illegal or unsupported input format %x\n",
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__FUNCTION__, s->iformat);
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__func__, s->iformat);
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break;
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case 0x8e: /* Data Source Select */
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s->source = value & 7;
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@ -730,7 +730,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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!((s->ix[1] - s->ix[0]) & (s->iy[1] - s->iy[0]) &
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(s->ox[1] - s->ox[0]) & (s->oy[1] - s->oy[0]) & 1))
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fprintf(stderr, "%s: Illegal input/output window positions\n",
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__FUNCTION__);
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__func__);
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blizzard_transfer_setup(s);
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break;
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@ -784,7 +784,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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s->pm = value & 0x83;
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if (value & s->mode & 1)
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fprintf(stderr, "%s: The display must be disabled before entering "
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"Standby Mode\n", __FUNCTION__);
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"Standby Mode\n", __func__);
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break;
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case 0xe8: /* Non-display Period Control / Status */
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s->status = value & 0x1b;
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@ -815,7 +815,7 @@ static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
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break;
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default:
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fprintf(stderr, "%s: unknown register %02x\n", __FUNCTION__, reg);
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fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
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break;
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}
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}
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@ -526,7 +526,7 @@ static void omap_disc_write(void *opaque, hwaddr addr,
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s->dispc.l[0].attr = value & 0x7ff;
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if (value & (3 << 9))
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fprintf(stderr, "%s: Big-endian pixel format not supported\n",
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__FUNCTION__);
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__func__);
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s->dispc.l[0].enable = value & 1;
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s->dispc.l[0].bpp = (value >> 1) & 0xf;
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s->dispc.invalidate = 1;
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@ -617,7 +617,7 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
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if (s->rfbi.control & (1 << 1)) { /* BYPASS */
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/* TODO: in non-Bypass mode we probably need to just assert the
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* DRQ and wait for DMA to write the pixels. */
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fprintf(stderr, "%s: Bypass mode unimplemented\n", __FUNCTION__);
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fprintf(stderr, "%s: Bypass mode unimplemented\n", __func__);
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return;
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}
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@ -1086,6 +1086,6 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
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void omap_rfbi_attach(struct omap_dss_s *s, int cs, struct rfbi_chip_s *chip)
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{
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if (cs < 0 || cs > 1)
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hw_error("%s: wrong CS %i\n", __FUNCTION__, cs);
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hw_error("%s: wrong CS %i\n", __func__, cs);
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s->rfbi.chip[cs] = chip;
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}
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@ -405,7 +405,7 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr offset,
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default:
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fail:
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hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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}
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return 0;
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@ -424,7 +424,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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s->status[0] |= LCSR0_QD;
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if (!(s->control[0] & LCCR0_LCDT) && (value & LCCR0_LCDT))
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printf("%s: internal frame buffer unsupported\n", __FUNCTION__);
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printf("%s: internal frame buffer unsupported\n", __func__);
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if ((s->control[3] & LCCR3_API) &&
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(value & LCCR0_ENB) && !(value & LCCR0_LCDT))
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@ -460,7 +460,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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case OVL1C1:
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if (!(s->ovl1c[0] & OVLC1_EN) && (value & OVLC1_EN))
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printf("%s: Overlay 1 not supported\n", __FUNCTION__);
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printf("%s: Overlay 1 not supported\n", __func__);
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s->ovl1c[0] = value & 0x80ffffff;
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s->dma_ch[1].up = (value & OVLC1_EN) || (s->control[0] & LCCR0_SDS);
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@ -472,7 +472,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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case OVL2C1:
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if (!(s->ovl2c[0] & OVLC1_EN) && (value & OVLC1_EN))
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printf("%s: Overlay 2 not supported\n", __FUNCTION__);
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printf("%s: Overlay 2 not supported\n", __func__);
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s->ovl2c[0] = value & 0x80ffffff;
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s->dma_ch[2].up = !!(value & OVLC1_EN);
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@ -486,7 +486,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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case CCR:
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if (!(s->ccr & CCR_CEN) && (value & CCR_CEN))
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printf("%s: Hardware cursor unimplemented\n", __FUNCTION__);
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printf("%s: Hardware cursor unimplemented\n", __func__);
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s->ccr = value & 0x81ffffe7;
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s->dma_ch[5].up = !!(value & CCR_CEN);
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@ -560,7 +560,7 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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default:
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fail:
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hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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}
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}
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@ -1050,7 +1050,7 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
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s->dest_width = 4;
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break;
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default:
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fprintf(stderr, "%s: Bad color depth\n", __FUNCTION__);
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fprintf(stderr, "%s: Bad color depth\n", __func__);
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exit(1);
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}
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@ -78,7 +78,7 @@ void qxl_render_resize(PCIQXLDevice *qxl)
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qxl->guest_primary.bits_pp = 32;
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break;
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default:
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fprintf(stderr, "%s: unhandled format: %x\n", __FUNCTION__,
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fprintf(stderr, "%s: unhandled format: %x\n", __func__,
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qxl->guest_primary.surface.format);
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qxl->guest_primary.bytes_pp = 4;
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qxl->guest_primary.bits_pp = 32;
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@ -248,7 +248,7 @@ static QEMUCursor *qxl_cursor(PCIQXLDevice *qxl, QXLCursor *cursor,
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break;
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default:
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fprintf(stderr, "%s: not implemented: type %d\n",
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__FUNCTION__, cursor->header.type);
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__func__, cursor->header.type);
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goto fail;
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}
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return c;
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@ -275,7 +275,7 @@ int qxl_render_cursor(PCIQXLDevice *qxl, QXLCommandExt *ext)
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}
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if (qxl->debug > 1 && cmd->type != QXL_CURSOR_MOVE) {
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fprintf(stderr, "%s", __FUNCTION__);
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fprintf(stderr, "%s", __func__);
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qxl_log_cmd_cursor(qxl, cmd, ext->group_id);
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fprintf(stderr, "\n");
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}
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@ -132,7 +132,7 @@ typedef struct PCIQXLDevice {
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#define PCI_QXL(obj) OBJECT_CHECK(PCIQXLDevice, (obj), TYPE_PCI_QXL)
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#define PANIC_ON(x) if ((x)) { \
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printf("%s: PANIC %s failed\n", __FUNCTION__, #x); \
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printf("%s: PANIC %s failed\n", __func__, #x); \
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abort(); \
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}
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@ -148,7 +148,7 @@ static void tc6393xb_gpio_set(void *opaque, int line, int level)
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// TC6393xbState *s = opaque;
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if (line > TC6393XB_GPIOS) {
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printf("%s: No GPIO pin %i\n", __FUNCTION__, line);
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printf("%s: No GPIO pin %i\n", __func__, line);
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return;
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}
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@ -662,7 +662,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h)
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}
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if (oops) /* should not happen */
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xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n",
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__FUNCTION__, xenfb->depth, bpp);
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__func__, xenfb->depth, bpp);
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dpy_gfx_update(xenfb->con, x, y, w, h);
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}
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