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https://github.com/Motorhead1991/qemu.git
synced 2025-08-08 10:13:56 -06:00
Use firmware configuration instead of NVRAM (initial patch by Aurelien Jarno)
Use firmware configuration device for boot device, kernel, initrd and kernel command line parameters on PPC, Sparc32 and Sparc64. Update OpenBIOS images to r479 which supports the change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6777 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
7e12f65678
commit
513f789f6b
10 changed files with 112 additions and 261 deletions
98
hw/sun4m.c
98
hw/sun4m.c
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@ -174,24 +174,9 @@ void DMA_register_channel (int nchan,
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{
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}
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static int nvram_boot_set(void *opaque, const char *boot_device)
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static int fw_cfg_boot_set(void *opaque, const char *boot_device)
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{
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unsigned int i;
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uint8_t image[sizeof(ohwcfg_v3_t)];
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ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ
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m48t59_t *nvram = (m48t59_t *)opaque;
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for (i = 0; i < sizeof(image); i++)
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image[i] = m48t59_read(nvram, i) & 0xff;
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pstrcpy((char *)header->boot_devices, sizeof(header->boot_devices),
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boot_device);
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header->nboot_devices = strlen(boot_device) & 0xff;
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header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
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for (i = 0; i < sizeof(image); i++)
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m48t59_write(nvram, i, image[i]);
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fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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return 0;
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}
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@ -204,48 +189,11 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
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unsigned int i;
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uint32_t start, end;
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uint8_t image[0x1ff0];
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ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ
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struct sparc_arch_cfg *sparc_header;
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struct OpenBIOS_nvpart_v1 *part_header;
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memset(image, '\0', sizeof(image));
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// Try to match PPC NVRAM
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pstrcpy((char *)header->struct_ident, sizeof(header->struct_ident),
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"QEMU_BIOS");
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header->struct_version = cpu_to_be32(3); /* structure v3 */
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header->nvram_size = cpu_to_be16(0x2000);
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header->nvram_arch_ptr = cpu_to_be16(sizeof(ohwcfg_v3_t));
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header->nvram_arch_size = cpu_to_be16(sizeof(struct sparc_arch_cfg));
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pstrcpy((char *)header->arch, sizeof(header->arch), arch);
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header->nb_cpus = smp_cpus & 0xff;
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header->RAM0_base = 0;
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header->RAM0_size = cpu_to_be64((uint64_t)RAM_size);
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pstrcpy((char *)header->boot_devices, sizeof(header->boot_devices),
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boot_devices);
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header->nboot_devices = strlen(boot_devices) & 0xff;
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header->kernel_image = cpu_to_be64((uint64_t)KERNEL_LOAD_ADDR);
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header->kernel_size = cpu_to_be64((uint64_t)kernel_size);
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if (cmdline) {
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pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, cmdline);
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header->cmdline = cpu_to_be64((uint64_t)CMDLINE_ADDR);
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header->cmdline_size = cpu_to_be64((uint64_t)strlen(cmdline));
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}
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// XXX add initrd_image, initrd_size
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header->width = cpu_to_be16(width);
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header->height = cpu_to_be16(height);
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header->depth = cpu_to_be16(depth);
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if (nographic)
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header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS);
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header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
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// Architecture specific header
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start = sizeof(ohwcfg_v3_t);
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sparc_header = (struct sparc_arch_cfg *)&image[start];
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sparc_header->valid = 0;
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start += sizeof(struct sparc_arch_cfg);
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start = 0;
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// OpenBIOS nvram variables
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// Variable partition
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@ -277,8 +225,6 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
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for (i = 0; i < sizeof(image); i++)
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m48t59_write(nvram, i, image[i]);
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qemu_register_boot_set(nvram_boot_set, nvram);
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}
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static void *slavio_intctl;
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@ -604,6 +550,18 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
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fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
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if (kernel_cmdline) {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
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pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
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} else {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
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}
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
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fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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}
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enum {
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@ -1362,6 +1320,19 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
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fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
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if (kernel_cmdline) {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
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pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
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} else {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
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}
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
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fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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}
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/* SPARCserver 1000 hardware initialisation */
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@ -1580,6 +1551,19 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
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fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
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if (kernel_cmdline) {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
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pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
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} else {
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fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
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}
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
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fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
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fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
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qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
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}
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/* SPARCstation 2 hardware initialisation */
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