- Added triboard with tc27x_soc

- Cleaned up get_physical_address()
 - Fixed corner case bugs in OPC2_32_RRPW_IMASK and OPC2_32_RRPW_IMASK
   insns
 -----BEGIN PGP SIGNATURE-----
 
 iQJTBAABCgA9FiEEbmNqfoPy3Qz6bm43CtLGOWtpyhQFAmBOFUcfHGtiYXN0aWFu
 QG1haWwudW5pLXBhZGVyYm9ybi5kZQAKCRAK0sY5a2nKFNz/D/4va/Tz06aNPmDA
 Ep4aQDDfTFVjs16dgN4DAMUCuKD1pq2ot97uZL7B+B7nBsN+0UHErz0Mp1yT10Ae
 NbmSNJ7QFvDi5G8xHdZjCj2+Gs8hM4Ff0+kxnmFLqpGK5u8Pso0C3KapCHolwojb
 gk3WXFEeBYtEwBDkmUAbX/Lp018/bL+wbcf9sSfNcshUKmE3MAVCLNeMzJ3gqZOO
 H8yNVEM3sPoEecr8TayCaLoc8JQrQnHTc4tHT+jj078+HPyVpYRjr8PZkhm6Oh9i
 KzTjxKsQt5IPFXDLdKQj1KJeqtbQGm9GSIIi1cbLJBFalQT94qsgX46g29XNdz1A
 UqocKB1yZF+L/Fd+Ymxo1pNpL9nCuy9gMl1MNV7rmubufMzy/WEhWQfJvIBC9B+T
 PKs8TmR+HY/qe9mPZakUtaFx+Hh1QJ+HROtRKLovqUEvA76XRqAyDUAJNjkm68vB
 bimHN2YUOfVne4fvyigoLowdWMQ98B3v6Rh0r9wmAYuw9PR/SIkNIPHTRswz2MdK
 WkR21bOwklw96d5OgJM1aJ4mC7PGMFDkF4ErNp1/R8h16JDJ+kQMxxmaij2H19Oo
 cwe6qo7A+fgU6SsER5i75fn+eD0MQMK3UgGhwDhSw2/Kvhjlo+xhXnaI/a6wGFLl
 PIlT14oiRjR1082qiLl65i1bYTDryQ==
 =7YWJ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20210314' into staging

- Added triboard with tc27x_soc
- Cleaned up get_physical_address()
- Fixed corner case bugs in OPC2_32_RRPW_IMASK and OPC2_32_RRPW_IMASK
  insns

# gpg: Signature made Sun 14 Mar 2021 13:53:11 GMT
# gpg:                using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69CA14
# gpg:                issuer "kbastian@mail.uni-paderborn.de"
# gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" [full]
# Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E  6E37 0AD2 C639 6B69 CA14

* remotes/bkoppelmann2/tags/pull-tricore-20210314:
  target/tricore: Fix OPC2_32_RRPW_EXTR for width=0
  target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2
  tricore: fixed faulty conditions for extr and imask
  target/tricore: Remove unused definitions
  target/tricore: Pass MMUAccessType to get_physical_address()
  target/tricore: Replace magic value by MMU_DATA_LOAD definition
  tricore: added triboard with tc27x_soc

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-03-15 15:34:27 +00:00
commit 51204c2f18
10 changed files with 554 additions and 23 deletions

View file

@ -0,0 +1,129 @@
/*
* Infineon tc27x SoC System emulation.
*
* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de>
* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef TC27X_SoC_H
#define TC27X_SoC_H
#include "hw/sysbus.h"
#include "target/tricore/cpu.h"
#include "qom/object.h"
#define TYPE_TC27X_SOC ("tc27x-soc")
OBJECT_DECLARE_TYPE(TC27XSoCState, TC27XSoCClass, TC27X_SOC)
typedef struct TC27XSoCCPUMemState {
MemoryRegion dspr;
MemoryRegion pspr;
MemoryRegion dcache;
MemoryRegion dtag;
MemoryRegion pcache;
MemoryRegion ptag;
} TC27XSoCCPUMemState;
typedef struct TC27XSoCFlashMemState {
MemoryRegion pflash0_c;
MemoryRegion pflash1_c;
MemoryRegion pflash0_u;
MemoryRegion pflash1_u;
MemoryRegion dflash0;
MemoryRegion dflash1;
MemoryRegion olda_c;
MemoryRegion olda_u;
MemoryRegion brom_c;
MemoryRegion brom_u;
MemoryRegion lmuram_c;
MemoryRegion lmuram_u;
MemoryRegion emem_c;
MemoryRegion emem_u;
} TC27XSoCFlashMemState;
typedef struct TC27XSoCState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
TriCoreCPU cpu;
MemoryRegion dsprX;
MemoryRegion psprX;
TC27XSoCCPUMemState cpu0mem;
TC27XSoCCPUMemState cpu1mem;
TC27XSoCCPUMemState cpu2mem;
TC27XSoCFlashMemState flashmem;
} TC27XSoCState;
typedef struct MemmapEntry {
hwaddr base;
hwaddr size;
} MemmapEntry;
typedef struct TC27XSoCClass {
DeviceClass parent_class;
const char *name;
const char *cpu_type;
const MemmapEntry *memmap;
uint32_t num_cpus;
} TC27XSoCClass;
enum {
TC27XD_DSPR2,
TC27XD_DCACHE2,
TC27XD_DTAG2,
TC27XD_PSPR2,
TC27XD_PCACHE2,
TC27XD_PTAG2,
TC27XD_DSPR1,
TC27XD_DCACHE1,
TC27XD_DTAG1,
TC27XD_PSPR1,
TC27XD_PCACHE1,
TC27XD_PTAG1,
TC27XD_DSPR0,
TC27XD_PSPR0,
TC27XD_PCACHE0,
TC27XD_PTAG0,
TC27XD_PFLASH0_C,
TC27XD_PFLASH1_C,
TC27XD_OLDA_C,
TC27XD_BROM_C,
TC27XD_LMURAM_C,
TC27XD_EMEM_C,
TC27XD_PFLASH0_U,
TC27XD_PFLASH1_U,
TC27XD_DFLASH0,
TC27XD_DFLASH1,
TC27XD_OLDA_U,
TC27XD_BROM_U,
TC27XD_LMURAM_U,
TC27XD_EMEM_U,
TC27XD_PSPRX,
TC27XD_DSPRX,
};
#endif

View file

@ -0,0 +1,50 @@
/*
* Infineon TriBoard System emulation.
*
* Copyright (c) 2020 Andreas Konopik <andreas.konopik@efs-auto.de>
* Copyright (c) 2020 David Brenken <david.brenken@efs-auto.de>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/boards.h"
#include "hw/arm/boot.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
#include "qom/object.h"
#include "hw/tricore/tc27x_soc.h"
#define TYPE_TRIBOARD_MACHINE MACHINE_TYPE_NAME("triboard")
typedef struct TriBoardMachineState TriBoardMachineState;
typedef struct TriBoardMachineClass TriBoardMachineClass;
DECLARE_OBJ_CHECKERS(TriBoardMachineState, TriBoardMachineClass,
TRIBOARD_MACHINE, TYPE_TRIBOARD_MACHINE)
struct TriBoardMachineState {
MachineState parent;
TC27XSoCState tc27x_soc;
};
struct TriBoardMachineClass {
MachineClass parent_obj;
const char *name;
const char *desc;
const char *soc_name;
};