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linux-headers: Update
Update to mainline commit: d1eef1c61974 ("Linux 5.5-rc2") Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> Message-Id: <20191219031445.8949-2-bharata@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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7 changed files with 132 additions and 4 deletions
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@ -68,7 +68,7 @@ extern "C" {
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#define fourcc_code(a, b, c, d) ((uint32_t)(a) | ((uint32_t)(b) << 8) | \
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((uint32_t)(c) << 16) | ((uint32_t)(d) << 24))
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#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */
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#define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
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/* Reserve 0 for the invalid format specifier */
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#define DRM_FORMAT_INVALID 0
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@ -647,7 +647,21 @@ extern "C" {
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* Further information on the use of AFBC modifiers can be found in
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* Documentation/gpu/afbc.rst
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*/
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#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode)
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/*
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* The top 4 bits (out of the 56 bits alloted for specifying vendor specific
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* modifiers) denote the category for modifiers. Currently we have only two
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* categories of modifiers ie AFBC and MISC. We can have a maximum of sixteen
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* different categories.
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*/
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#define DRM_FORMAT_MOD_ARM_CODE(__type, __val) \
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fourcc_mod_code(ARM, ((uint64_t)(__type) << 52) | ((__val) & 0x000fffffffffffffULL))
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#define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00
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#define DRM_FORMAT_MOD_ARM_TYPE_MISC 0x01
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#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
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DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode)
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/*
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* AFBC superblock size
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@ -741,6 +755,16 @@ extern "C" {
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*/
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#define AFBC_FORMAT_MOD_BCH (1ULL << 11)
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/*
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* Arm 16x16 Block U-Interleaved modifier
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*
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* This is used by Arm Mali Utgard and Midgard GPUs. It divides the image
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* into 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
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* in the block are reordered.
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*/
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#define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
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DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)
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/*
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* Allwinner tiled modifier
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*
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