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target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc

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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-11-06 11:39:19 -08:00
parent 2358cf77d1
commit 50280618d9
1 changed files with 2 additions and 2 deletions
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4
target/sparc/translate.c
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@ -488,6 +488,7 @@ static void gen_op_subccc(TCGv dst, TCGv src1, TCGv src2)
static void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) static void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
{ {
TCGv zero = tcg_constant_tl(0); TCGv zero = tcg_constant_tl(0);
TCGv one = tcg_constant_tl(1);
TCGv t_src1 = tcg_temp_new(); TCGv t_src1 = tcg_temp_new();
TCGv t_src2 = tcg_temp_new(); TCGv t_src2 = tcg_temp_new();
TCGv t0 = tcg_temp_new(); TCGv t0 = tcg_temp_new();
@ -499,8 +500,7 @@ static void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
* if (!(env->y & 1)) * if (!(env->y & 1))
* src2 = 0; * src2 = 0;
*/ */
tcg_gen_andi_tl(t0, cpu_y, 0x1); tcg_gen_movcond_tl(TCG_COND_TSTEQ, t_src2, cpu_y, one, zero, t_src2);
tcg_gen_movcond_tl(TCG_COND_EQ, t_src2, t0, zero, zero, t_src2);
/* /*
* b2 = src1 & 1; * b2 = src1 & 1;