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Fix trivial "endianness bugs"

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Replace endianess -> endianness.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Stefan Weil 2011-03-13 15:44:02 +01:00 • committed by Aurelien Jarno
parent 2055283bcc
commit 4ff9786c67
5 changed files with 15 additions and 15 deletions
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2
target-microblaze/translate.c
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@ -923,7 +923,7 @@ static void dec_load(DisasContext *dc)
/*
* When doing reverse accesses we need to do two things.
*
* 1. Reverse the address wrt endianess.
* 1. Reverse the address wrt endianness.
* 2. Byteswap the data lanes on the way back into the CPU core.
*/
if (rev && size != 4) {