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target-s390x: avoid AREG0 for integer helpers
Make integer helpers take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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449c0d70b6
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4fda26a7b0
4 changed files with 19 additions and 20 deletions
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@ -1803,7 +1803,7 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2)
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tmp2 = tcg_temp_new_i64();
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tmp32_1 = tcg_const_i32(r1);
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tcg_gen_qemu_ld64(tmp2, addr, get_mem_index(s));
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gen_helper_mlg(tmp32_1, tmp2);
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gen_helper_mlg(cpu_env, tmp32_1, tmp2);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i32(tmp32_1);
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break;
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@ -1811,7 +1811,7 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2)
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tmp2 = tcg_temp_new_i64();
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tmp32_1 = tcg_const_i32(r1);
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tcg_gen_qemu_ld64(tmp2, addr, get_mem_index(s));
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gen_helper_dlg(tmp32_1, tmp2);
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gen_helper_dlg(cpu_env, tmp32_1, tmp2);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i32(tmp32_1);
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break;
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@ -1837,7 +1837,7 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2)
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tcg_gen_qemu_ld64(tmp2, addr, get_mem_index(s));
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/* XXX possible optimization point */
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gen_op_calc_cc(s);
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gen_helper_slbg(cc_op, cc_op, tmp32_1, regs[r1], tmp2);
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gen_helper_slbg(cc_op, cpu_env, cc_op, tmp32_1, regs[r1], tmp2);
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set_cc_static(s);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i32(tmp32_1);
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@ -1917,7 +1917,7 @@ static void disas_e3(DisasContext* s, int op, int r1, int x2, int b2, int d2)
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tcg_gen_trunc_i64_i32(tmp32_2, tmp2);
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/* XXX possible optimization point */
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gen_op_calc_cc(s);
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gen_helper_slb(cc_op, cc_op, tmp32_1, tmp32_2);
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gen_helper_slb(cc_op, cpu_env, cc_op, tmp32_1, tmp32_2);
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set_cc_static(s);
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tcg_temp_free_i64(tmp2);
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tcg_temp_free_i32(tmp32_1);
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@ -3535,7 +3535,7 @@ static void disas_b9(DisasContext *s, int op, int r1, int r2)
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case 0x83: /* FLOGR R1,R2 [RRE] */
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tmp = load_reg(r2);
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tmp32_1 = tcg_const_i32(r1);
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gen_helper_flogr(cc_op, tmp32_1, tmp);
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gen_helper_flogr(cc_op, cpu_env, tmp32_1, tmp);
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set_cc_static(s);
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i32(tmp32_1);
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@ -3555,7 +3555,7 @@ static void disas_b9(DisasContext *s, int op, int r1, int r2)
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case 0x87: /* DLGR R1,R2 [RRE] */
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tmp32_1 = tcg_const_i32(r1);
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tmp = load_reg(r2);
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gen_helper_dlg(tmp32_1, tmp);
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gen_helper_dlg(cpu_env, tmp32_1, tmp);
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i32(tmp32_1);
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break;
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@ -3580,7 +3580,7 @@ static void disas_b9(DisasContext *s, int op, int r1, int r2)
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tmp2 = load_reg(r2);
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tmp32_1 = tcg_const_i32(r1);
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gen_op_calc_cc(s);
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gen_helper_slbg(cc_op, cc_op, tmp32_1, tmp, tmp2);
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gen_helper_slbg(cc_op, cpu_env, cc_op, tmp32_1, tmp, tmp2);
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set_cc_static(s);
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i64(tmp2);
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@ -3647,7 +3647,7 @@ static void disas_b9(DisasContext *s, int op, int r1, int r2)
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tmp32_1 = load_reg32(r2);
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tmp32_2 = tcg_const_i32(r1);
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gen_op_calc_cc(s);
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gen_helper_slb(cc_op, cc_op, tmp32_2, tmp32_1);
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gen_helper_slb(cc_op, cpu_env, cc_op, tmp32_2, tmp32_1);
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set_cc_static(s);
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i32(tmp32_2);
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