motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-06 01:03:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/riscv: Remove the hardcoded MSTATUS_SD macro

Browse source 
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: fcc125d96da941b56c817c9dd6068dc36478fc53.1619234854.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2021-04-24 13:33:18 +10:00
parent 994b6bb2db
commit 4fd7455bb3
3 changed files with 27 additions and 14 deletions
Download patch file Download diff file Expand all files Collapse all files

12
target/riscv/csr.c
View file

@ -538,7 +538,11 @@ static RISCVException write_mstatus(CPURISCVState *env, int csrno,
dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
((mstatus & MSTATUS_XS) == MSTATUS_XS);
mstatus = set_field(mstatus, MSTATUS_SD, dirty);
if (riscv_cpu_is_32bit(env)) {
mstatus = set_field(mstatus, MSTATUS32_SD, dirty);
} else {
mstatus = set_field(mstatus, MSTATUS64_SD, dirty);
}
env->mstatus = mstatus;
return RISCV_EXCP_NONE;
@ -614,7 +618,11 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
}
/* misa.MXL writes are not supported by QEMU */
val = (env->misa & MISA_MXL) | (val & ~MISA_MXL);
if (riscv_cpu_is_32bit(env)) {
val = (env->misa & MISA32_MXL) | (val & ~MISA32_MXL);
} else {
val = (env->misa & MISA64_MXL) | (val & ~MISA64_MXL);
}
/* flush translation cache */
if (val != env->misa) {