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target/sparc: Implement FMAf extension

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Rearrange PDIST so that do_dddd is general purpose and may
be re-used for FMADDd etc.  Add pickNaN and pickNaNMulAdd.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-11-04 12:13:00 -07:00
parent 28c131a34d
commit 4fd71d19ac
8 changed files with 155 additions and 6 deletions
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31
fpu/softfloat-specialize.c.inc
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@ -447,6 +447,17 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
} else {
return 1;
}
#elif defined(TARGET_SPARC)
/* Prefer SNaN over QNaN, order B then A. */
if (is_snan(b_cls)) {
return 1;
} else if (is_snan(a_cls)) {
return 0;
} else if (is_qnan(b_cls)) {
return 1;
} else {
return 0;
}
#elif defined(TARGET_XTENSA)
/*
* Xtensa has two NaN propagation modes.
@ -624,6 +635,26 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
float_raise(float_flag_invalid | float_flag_invalid_imz, status);
}
return 3; /* default NaN */
#elif defined(TARGET_SPARC)
/* For (inf,0,nan) return c. */
if (infzero) {
float_raise(float_flag_invalid | float_flag_invalid_imz, status);
return 2;
}
/* Prefer SNaN over QNaN, order C, B, A. */
if (is_snan(c_cls)) {
return 2;
} else if (is_snan(b_cls)) {
return 1;
} else if (is_snan(a_cls)) {
return 0;
} else if (is_qnan(c_cls)) {
return 2;
} else if (is_qnan(b_cls)) {
return 1;
} else {
return 0;
}
#elif defined(TARGET_XTENSA)
/*
* For Xtensa, the (inf,zero,nan) case sets InvalidOp and returns