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hw/pxb: Allow creation of a CXL PXB (host bridge)
This works like adding a typical pxb device, except the name is 'pxb-cxl' instead of 'pxb-pcie'. An example command line would be as follows: -device pxb-cxl,id=cxl.0,bus="pcie.0",bus_nr=1 A CXL PXB is backward compatible with PCIe. What this means in practice is that an operating system that is unaware of CXL should still be able to enumerate this topology as if it were PCIe. One can create multiple CXL PXB host bridges, but a host bridge can only be connected to the main root bus. Host bridges cannot appear elsewhere in the topology. Note that as of this patch, the ACPI tables needed for the host bridge (specifically, an ACPI object in _SB named ACPI0016 and the CEDT) aren't created. So while this patch internally creates it, it cannot be properly used by an operating system or other system software. Also necessary is to add an exception to scripts/device-crash-test similar to that for exiting pxb as both must created on a PCIexpress host bus. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jonathan.Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-15-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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4 changed files with 98 additions and 2 deletions
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@ -408,6 +408,7 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
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#define TYPE_PCI_BUS "PCI"
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OBJECT_DECLARE_TYPE(PCIBus, PCIBusClass, PCI_BUS)
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#define TYPE_PCIE_BUS "PCIE"
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#define TYPE_CXL_BUS "CXL"
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typedef void (*pci_bus_dev_fn)(PCIBus *b, PCIDevice *d, void *opaque);
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typedef void (*pci_bus_fn)(PCIBus *b, void *opaque);
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@ -770,6 +771,11 @@ static inline void pci_irq_pulse(PCIDevice *pci_dev)
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pci_irq_deassert(pci_dev);
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}
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static inline int pci_is_cxl(const PCIDevice *d)
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{
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return d->cap_present & QEMU_PCIE_CAP_CXL;
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}
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static inline int pci_is_express(const PCIDevice *d)
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{
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return d->cap_present & QEMU_PCI_CAP_EXPRESS;
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