mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 07:43:54 -06:00
tcg: implement real ext_i32_i64 and extu_i32_i64 ops
Implement real ext_i32_i64 and extu_i32_i64 ops. They ensure that a 32-bit value is always converted to a 64-bit value and not propagated through the register allocator or the optimizer. Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Stefan Weil <sw@weilnetz.de> Acked-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
parent
6acd2558fd
commit
4f2331e5b6
10 changed files with 45 additions and 10 deletions
6
tci.c
6
tci.c
|
@ -1033,18 +1033,20 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
|||
#endif
|
||||
#if TCG_TARGET_HAS_ext32s_i64
|
||||
case INDEX_op_ext32s_i64:
|
||||
#endif
|
||||
case INDEX_op_ext_i32_i64:
|
||||
t0 = *tb_ptr++;
|
||||
t1 = tci_read_r32s(&tb_ptr);
|
||||
tci_write_reg64(t0, t1);
|
||||
break;
|
||||
#endif
|
||||
#if TCG_TARGET_HAS_ext32u_i64
|
||||
case INDEX_op_ext32u_i64:
|
||||
#endif
|
||||
case INDEX_op_extu_i32_i64:
|
||||
t0 = *tb_ptr++;
|
||||
t1 = tci_read_r32(&tb_ptr);
|
||||
tci_write_reg64(t0, t1);
|
||||
break;
|
||||
#endif
|
||||
#if TCG_TARGET_HAS_bswap16_i64
|
||||
case INDEX_op_bswap16_i64:
|
||||
TODO();
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue