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tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK
This will enable us to decouple code translation from the value of parallel_cpus at any given time. It will also help us minimize TB flushes when generating code via EXCP_ATOMIC. Note that the declaration of parallel_cpus is brought to exec-all.h to be able to define there the "curr_cflags" inline. Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4e2ca83e71
10 changed files with 65 additions and 39 deletions
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@ -325,6 +325,9 @@ struct TranslationBlock {
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#define CF_USE_ICOUNT 0x20000
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#define CF_IGNORE_ICOUNT 0x40000 /* Do not generate icount code */
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#define CF_INVALID 0x80000 /* TB is stale. Setters must acquire tb_lock */
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#define CF_PARALLEL 0x100000 /* Generate code for a parallel context */
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/* cflags' mask for hashing/comparison */
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#define CF_HASH_MASK (CF_PARALLEL)
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/* Per-vCPU dynamic tracing state used to generate this TB */
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uint32_t trace_vcpu_dstate;
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@ -365,11 +368,26 @@ struct TranslationBlock {
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uintptr_t jmp_list_first;
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};
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extern bool parallel_cpus;
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/* Hide the atomic_read to make code a little easier on the eyes */
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static inline uint32_t tb_cflags(const TranslationBlock *tb)
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{
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return atomic_read(&tb->cflags);
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}
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/* current cflags for hashing/comparison */
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static inline uint32_t curr_cflags(void)
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{
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return parallel_cpus ? CF_PARALLEL : 0;
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}
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void tb_free(TranslationBlock *tb);
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void tb_flush(CPUState *cpu);
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void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
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TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags);
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target_ulong cs_base, uint32_t flags,
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uint32_t cf_mask);
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void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
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/* GETPC is the true target of the return instruction that we'll execute. */
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@ -48,8 +48,8 @@
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* xxhash32, customized for input variables that are not guaranteed to be
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* contiguous in memory.
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*/
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static inline
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uint32_t tb_hash_func6(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f)
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static inline uint32_t
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tb_hash_func7(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f, uint32_t g)
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{
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uint32_t v1 = TB_HASH_XX_SEED + PRIME32_1 + PRIME32_2;
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uint32_t v2 = TB_HASH_XX_SEED + PRIME32_2;
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@ -78,7 +78,7 @@ uint32_t tb_hash_func6(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f)
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v4 *= PRIME32_1;
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h32 = rol32(v1, 1) + rol32(v2, 7) + rol32(v3, 12) + rol32(v4, 18);
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h32 += 24;
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h32 += 28;
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h32 += e * PRIME32_3;
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h32 = rol32(h32, 17) * PRIME32_4;
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@ -86,6 +86,9 @@ uint32_t tb_hash_func6(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f)
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h32 += f * PRIME32_3;
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h32 = rol32(h32, 17) * PRIME32_4;
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h32 += g * PRIME32_3;
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h32 = rol32(h32, 17) * PRIME32_4;
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h32 ^= h32 >> 15;
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h32 *= PRIME32_2;
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h32 ^= h32 >> 13;
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@ -59,9 +59,9 @@ static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc)
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static inline
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uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags,
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uint32_t trace_vcpu_dstate)
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uint32_t cf_mask, uint32_t trace_vcpu_dstate)
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{
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return tb_hash_func6(phys_pc, pc, flags, trace_vcpu_dstate);
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return tb_hash_func7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate);
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}
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#endif
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@ -21,7 +21,7 @@
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/* Might cause an exception, so have a longjmp destination ready */
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static inline TranslationBlock *
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tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base,
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uint32_t *flags)
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uint32_t *flags, uint32_t cf_mask)
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{
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CPUArchState *env = (CPUArchState *)cpu->env_ptr;
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TranslationBlock *tb;
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@ -35,10 +35,10 @@ tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base,
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tb->cs_base == *cs_base &&
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tb->flags == *flags &&
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tb->trace_vcpu_dstate == *cpu->trace_dstate &&
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!(atomic_read(&tb->cflags) & CF_INVALID))) {
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(tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == cf_mask)) {
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return tb;
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}
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tb = tb_htable_lookup(cpu, *pc, *cs_base, *flags);
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tb = tb_htable_lookup(cpu, *pc, *cs_base, *flags, cf_mask);
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if (tb == NULL) {
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return NULL;
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}
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