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Reworking MIPS interrupt handling, by Aurelien Jarno.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-01-24 01:47:51 +00:00
parent 30c4bbace1
commit 4de9b249d3
13 changed files with 76 additions and 75 deletions
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7
hw/i8259.c
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@ -161,6 +161,13 @@ void pic_update_irq(PicState2 *s)
#endif
s->irq_request(s->irq_request_opaque, 1);
}
/* all targets should do this rather than acking the IRQ in the cpu */
#if defined(TARGET_MIPS)
else {
s->irq_request(s->irq_request_opaque, 0);
}
#endif
}
#ifdef DEBUG_IRQ_LATENCY