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Hexagon (target/hexagon) Analyze packet for HVX

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Extend the analyze_<tag> functions for HVX vector and predicate writes
Remove calls to ctx_log_vreg_write[_pair] from gen_tcg_funcs.py
During gen_start_packet, reload the predicated HVX registers into
    fugure_VRegs and tmp_VRegs

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230307025828.1612809-8-tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson 2023-03-06 18:58:21 -08:00
parent 4d13bb51d2
commit 4d6f84208c
4 changed files with 52 additions and 27 deletions
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18
target/hexagon/gen_tcg_funcs.py
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@ -152,17 +152,6 @@ def genptr_decl(f, tag, regtype, regid, regno):
f.write(" ctx_future_vreg_off(ctx, %s%sN," % \
(regtype, regid))
f.write(" 1, true);\n");
if 'A_CONDEXEC' in hex_common.attribdict[tag]:
f.write(" if (!is_vreg_preloaded(ctx, %s)) {\n" % (regN))
f.write(" intptr_t src_off =")
f.write(" offsetof(CPUHexagonState, VRegs[%s%sN]);\n"% \
(regtype, regid))
f.write(" tcg_gen_gvec_mov(MO_64, %s%sV_off,\n" % \
(regtype, regid))
f.write(" src_off,\n")
f.write(" sizeof(MMVector),\n")
f.write(" sizeof(MMVector));\n")
f.write(" }\n")
if (not hex_common.skip_qemu_helper(tag)):
f.write(" TCGv_ptr %s%sV = tcg_temp_new_ptr();\n" % \
@ -421,9 +410,6 @@ def genptr_dst_write_ext(f, tag, regtype, regid, newv="EXT_DFL"):
(regtype, regid, regtype, regid))
f.write("%s, insn->slot, %s);\n" % \
(newv, is_predicated))
f.write(" ctx_log_vreg_write_pair(ctx, %s%sN, %s,\n" % \
(regtype, regid, newv))
f.write(" %s);\n" % (is_predicated))
elif (regid in {"d", "x", "y"}):
if ('A_CONDEXEC' in hex_common.attribdict[tag]):
is_predicated = "true"
@ -433,8 +419,6 @@ def genptr_dst_write_ext(f, tag, regtype, regid, newv="EXT_DFL"):
(regtype, regid, regtype, regid, newv))
f.write("insn->slot, %s);\n" % \
(is_predicated))
f.write(" ctx_log_vreg_write(ctx, %s%sN, %s, %s);\n" % \
(regtype, regid, newv, is_predicated))
else:
print("Bad register parse: ", regtype, regid)
elif (regtype == "Q"):
@ -446,8 +430,6 @@ def genptr_dst_write_ext(f, tag, regtype, regid, newv="EXT_DFL"):
f.write(" gen_log_qreg_write(%s%sV_off, %s%sN, %s, " % \
(regtype, regid, regtype, regid, newv))
f.write("insn->slot, %s);\n" % (is_predicated))
f.write(" ctx_log_qreg_write(ctx, %s%sN, %s);\n" % \
(regtype, regid, is_predicated))
else:
print("Bad register parse: ", regtype, regid)
else: