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arm: Move gen_set_condexec() and gen_set_pc_im() up in the file

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Move the utility routines gen_set_condexec() and gen_set_pc_im()
up in the file, as we will want to use them from a function
placed earlier in the file than their current location.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1491844419-12485-5-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2017-04-20 17:32:30 +01:00
parent 5425415ebb
commit 4d5e8c969a
1 changed files with 15 additions and 16 deletions
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31
target/arm/translate.c
View file

@ -893,6 +893,21 @@ static const uint8_t table_logic_cc[16] = {
1, /* mvn */ 1, /* mvn */
}; };
static inline void gen_set_condexec(DisasContext *s)
{
if (s->condexec_mask) {
uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
store_cpu_field(tmp, condexec_bits);
}
}
static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
{
tcg_gen_movi_i32(cpu_R[15], val);
}
/* Set PC and Thumb state from an immediate address. */ /* Set PC and Thumb state from an immediate address. */
static inline void gen_bx_im(DisasContext *s, uint32_t addr) static inline void gen_bx_im(DisasContext *s, uint32_t addr)
{ {
@ -1069,11 +1084,6 @@ DO_GEN_ST(8, MO_UB)
DO_GEN_ST(16, MO_UW) DO_GEN_ST(16, MO_UW)
DO_GEN_ST(32, MO_UL) DO_GEN_ST(32, MO_UL)
static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
{
tcg_gen_movi_i32(cpu_R[15], val);
}
static inline void gen_hvc(DisasContext *s, int imm16) static inline void gen_hvc(DisasContext *s, int imm16)
{ {
/* The pre HVC helper handles cases when HVC gets trapped /* The pre HVC helper handles cases when HVC gets trapped
@ -1107,17 +1117,6 @@ static inline void gen_smc(DisasContext *s)
s->is_jmp = DISAS_SMC; s->is_jmp = DISAS_SMC;
} }
static inline void
gen_set_condexec (DisasContext *s)
{
if (s->condexec_mask) {
uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, val);
store_cpu_field(tmp, condexec_bits);
}
}
static void gen_exception_internal_insn(DisasContext *s, int offset, int excp) static void gen_exception_internal_insn(DisasContext *s, int offset, int excp)
{ {
gen_set_condexec(s); gen_set_condexec(s);