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target/riscv: Apply pointer masking for virtualized memory accesses

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Signed-off-by: Alexey Baturo <baturo.alexey@gmail.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250106102346.1100149-7-baturo.alexey@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Alexey Baturo 2025-01-06 13:23:45 +03:00 • committed by Alistair Francis
parent 4d501a7a7f
commit 4d1600934a
5 changed files with 82 additions and 29 deletions
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54
target/riscv/internals.h
View file

@ -145,4 +145,58 @@ static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f)
/* Our implementation of CPUClass::has_work */
bool riscv_cpu_has_work(CPUState *cs);
/* Zjpm addr masking routine */
static inline target_ulong adjust_addr_body(CPURISCVState *env,
target_ulong addr,
bool is_virt_addr)
{
RISCVPmPmm pmm = PMM_FIELD_DISABLED;
uint32_t pmlen = 0;
bool signext = false;
/* do nothing for rv32 mode */
if (riscv_cpu_mxl(env) == MXL_RV32) {
return addr;
}
/* get pmm field depending on whether addr is */
if (is_virt_addr) {
pmm = riscv_pm_get_virt_pmm(env);
} else {
pmm = riscv_pm_get_pmm(env);
}
/* if pointer masking is disabled, return original addr */
if (pmm == PMM_FIELD_DISABLED) {
return addr;
}
if (!is_virt_addr) {
signext = riscv_cpu_virt_mem_enabled(env);
}
addr = addr << pmlen;
pmlen = riscv_pm_get_pmlen(pmm);
/* sign/zero extend masked address by N-1 bit */
if (signext) {
addr = (target_long)addr >> pmlen;
} else {
addr = addr >> pmlen;
}
return addr;
}
static inline target_ulong adjust_addr(CPURISCVState *env,
target_ulong addr)
{
return adjust_addr_body(env, addr, false);
}
static inline target_ulong adjust_addr_virt(CPURISCVState *env,
target_ulong addr)
{
return adjust_addr_body(env, addr, true);
}
#endif