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target/riscv: pmp: Clear pmp/smepmp bits on reset

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As per the Priv and Smepmp specifications, certain bits such as the 'L'
bit of pmp entries and mseccfg.MML can only be cleared upon reset and it
is necessary to do so to allow 'M' mode firmware to correctly reinitialize
the pmp/smpemp state across reboots. As required by the spec, also clear
the 'A' field of pmp entries.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231019065644.1431798-1-mchitale@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Mayuresh Chitale 2023-10-19 12:26:44 +05:30 • committed by Alistair Francis
parent 095fe72a12
commit 4bf501dc01
3 changed files with 23 additions and 0 deletions
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10
target/riscv/pmp.c
View file

@ -135,6 +135,16 @@ static bool pmp_write_cfg(CPURISCVState *env, uint32_t pmp_index, uint8_t val)
return false;
}
void pmp_unlock_entries(CPURISCVState *env)
{
uint32_t pmp_num = pmp_get_num_rules(env);
int i;
for (i = 0; i < pmp_num; i++) {
env->pmp_state.pmp[i].cfg_reg &= ~(PMP_LOCK | PMP_AMATCH);
}
}
static void pmp_decode_napot(target_ulong a, target_ulong *sa,
target_ulong *ea)
{