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cpu: make CPU_INTERRUPT_RESET available on all targets
On the x86, some devices need access to the CPU reset pin (INIT#). Provide a generic service to do this, using one of the internal cpu_interrupt targets. Generalize the PPC-specific code for CPU_INTERRUPT_RESET to other targets. Since PPC does not support migration across QEMU versions (its machine types are not versioned yet), I picked the value that is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2 and TGT_INT_3 are shifted down by one while keeping their value. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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4 changed files with 22 additions and 19 deletions
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@ -381,6 +381,9 @@ CPUArchState *cpu_copy(CPUArchState *env);
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/* Debug event pending. */
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#define CPU_INTERRUPT_DEBUG 0x0080
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/* Reset signal. */
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#define CPU_INTERRUPT_RESET 0x0400
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/* Several target-specific external hardware interrupts. Each target/cpu.h
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should define proper names based on these defines. */
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#define CPU_INTERRUPT_TGT_EXT_0 0x0008
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@ -395,9 +398,8 @@ CPUArchState *cpu_copy(CPUArchState *env);
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instruction being executed. These, therefore, are not masked while
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single-stepping within the debugger. */
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#define CPU_INTERRUPT_TGT_INT_0 0x0100
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#define CPU_INTERRUPT_TGT_INT_1 0x0400
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#define CPU_INTERRUPT_TGT_INT_2 0x0800
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#define CPU_INTERRUPT_TGT_INT_3 0x2000
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#define CPU_INTERRUPT_TGT_INT_1 0x0800
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#define CPU_INTERRUPT_TGT_INT_2 0x2000
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/* First unused bit: 0x4000. */
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