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hw/cxl: Add a switch mailbox CCI function
CXL switch CCIs were added in CXL r3.0. They are a PCI function, identified by class code that provides a CXL mailbox (identical to that previously defined for CXL type 3 memory devices) over which various FM-API commands may be used. Whilst the intent of this feature is enable switch control from a BMC attached to a switch upstream port, it is also useful to allow emulation of this feature on the upstream port connected to a host using the CXL devices as this greatly simplifies testing. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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7 changed files with 175 additions and 1 deletions
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@ -67,6 +67,9 @@ static uint64_t mailbox_reg_read(void *opaque, hwaddr offset, unsigned size)
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if (object_dynamic_cast(OBJECT(cci->intf), TYPE_CXL_TYPE3)) {
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cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate;
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} else if (object_dynamic_cast(OBJECT(cci->intf),
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TYPE_CXL_SWITCH_MAILBOX_CCI)) {
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cxl_dstate = &CXL_SWITCH_MAILBOX_CCI(cci->intf)->cxl_dstate;
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} else {
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return 0;
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}
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@ -135,6 +138,9 @@ static void mailbox_reg_write(void *opaque, hwaddr offset, uint64_t value,
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if (object_dynamic_cast(OBJECT(cci->intf), TYPE_CXL_TYPE3)) {
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cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate;
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} else if (object_dynamic_cast(OBJECT(cci->intf),
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TYPE_CXL_SWITCH_MAILBOX_CCI)) {
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cxl_dstate = &CXL_SWITCH_MAILBOX_CCI(cci->intf)->cxl_dstate;
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} else {
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return;
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}
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@ -365,6 +371,27 @@ void cxl_device_register_init_t3(CXLType3Dev *ct3d)
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CXL_MAILBOX_MAX_PAYLOAD_SIZE);
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}
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void cxl_device_register_init_swcci(CSWMBCCIDev *sw)
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{
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CXLDeviceState *cxl_dstate = &sw->cxl_dstate;
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uint64_t *cap_h = cxl_dstate->caps_reg_state64;
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const int cap_count = 3;
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/* CXL Device Capabilities Array Register */
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ARRAY_FIELD_DP64(cap_h, CXL_DEV_CAP_ARRAY, CAP_ID, 0);
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ARRAY_FIELD_DP64(cap_h, CXL_DEV_CAP_ARRAY, CAP_VERSION, 1);
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ARRAY_FIELD_DP64(cap_h, CXL_DEV_CAP_ARRAY, CAP_COUNT, cap_count);
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cxl_device_cap_init(cxl_dstate, DEVICE_STATUS, 1, 2);
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device_reg_init_common(cxl_dstate);
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cxl_device_cap_init(cxl_dstate, MAILBOX, 2, 1);
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mailbox_reg_init_common(cxl_dstate);
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cxl_device_cap_init(cxl_dstate, MEMORY_DEVICE, 0x4000, 1);
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memdev_reg_init_common(cxl_dstate);
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}
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uint64_t cxl_device_get_timestamp(CXLDeviceState *cxl_dstate)
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{
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uint64_t time, delta;
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