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target/ppc: Implement slbiag

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Reviewed-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Message-Id: <20220701133507.740619-12-lucas.coutinho@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Lucas Coutinho 2022-07-01 10:35:07 -03:00 • committed by Daniel Henrique Barboza
parent acc130cf1d
commit 491a25535c
4 changed files with 46 additions and 0 deletions
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1
target/ppc/helper.h
View file

@ -681,6 +681,7 @@ DEF_HELPER_2(SLBMFEE, tl, env, tl)
DEF_HELPER_2(SLBMFEV, tl, env, tl) DEF_HELPER_2(SLBMFEV, tl, env, tl)
DEF_HELPER_2(SLBFEE, tl, env, tl) DEF_HELPER_2(SLBFEE, tl, env, tl)
DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32)
DEF_HELPER_FLAGS_3(SLBIAG, TCG_CALL_NO_RWG, void, env, tl, i32)
DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(SLBIEG, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(SLBIEG, TCG_CALL_NO_RWG, void, env, tl)
#endif #endif

4
target/ppc/insn32.decode
View file

@ -152,6 +152,9 @@
&X_rb rb &X_rb rb
@X_rb ...... ..... ..... rb:5 .......... . &X_rb @X_rb ...... ..... ..... rb:5 .......... . &X_rb
&X_rs_l rs l:bool
@X_rs_l ...... rs:5 .... l:1 ..... .......... . &X_rs_l
&X_uim5 xt uim:uint8_t &X_uim5 xt uim:uint8_t
@X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt @X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt
@ -869,6 +872,7 @@ SLBIE 011111 ----- ----- ..... 0110110010 - @X_rb
SLBIEG 011111 ..... ----- ..... 0111010010 - @X_tb SLBIEG 011111 ..... ----- ..... 0111010010 - @X_tb
SLBIA 011111 --... ----- ----- 0111110010 - @X_ih SLBIA 011111 --... ----- ----- 0111110010 - @X_ih
SLBIAG 011111 ..... ----. ----- 1101010010 - @X_rs_l
SLBMTE 011111 ..... ----- ..... 0110010010 - @X_tb SLBMTE 011111 ..... ----- ..... 0110010010 - @X_tb

27
target/ppc/mmu-hash64.c
View file

@ -173,6 +173,33 @@ void helper_SLBIA(CPUPPCState *env, uint32_t ih)
} }
} }
#if defined(TARGET_PPC64)
void helper_SLBIAG(CPUPPCState *env, target_ulong rs, uint32_t l)
{
PowerPCCPU *cpu = env_archcpu(env);
int n;
/*
* slbiag must always flush all TLB (which is equivalent to ERAT in ppc
* architecture). Matching on SLB_ESID_V is not good enough, because slbmte
* can overwrite a valid SLB without flushing its lookaside information.
*
* It would be possible to keep the TLB in synch with the SLB by flushing
* when a valid entry is overwritten by slbmte, and therefore slbiag would
* not have to flush unless it evicts a valid SLB entry. However it is
* expected that slbmte is more common than slbiag, and slbiag is usually
* going to evict valid SLB entries, so that tradeoff is unlikely to be a
* good one.
*/
env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
for (n = 0; n < cpu->hash64_opts->slb_size; n++) {
ppc_slb_t *slb = &env->slb[n];
slb->esid &= ~SLB_ESID_V;
}
}
#endif
static void __helper_slbie(CPUPPCState *env, target_ulong addr, static void __helper_slbie(CPUPPCState *env, target_ulong addr,
target_ulong global) target_ulong global)
{ {

14
target/ppc/translate/storage-ctrl-impl.c.inc
View file

@ -65,6 +65,20 @@ static bool trans_SLBIA(DisasContext *ctx, arg_SLBIA *a)
return true; return true;
} }
static bool trans_SLBIAG(DisasContext *ctx, arg_SLBIAG *a)
{
REQUIRE_64BIT(ctx);
REQUIRE_INSNS_FLAGS2(ctx, ISA300);
REQUIRE_SV(ctx);
#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)
gen_helper_SLBIAG(cpu_env, cpu_gpr[a->rs], tcg_constant_i32(a->l));
#else
qemu_build_not_reached();
#endif
return true;
}
static bool trans_SLBMTE(DisasContext *ctx, arg_SLBMTE *a) static bool trans_SLBMTE(DisasContext *ctx, arg_SLBMTE *a)
{ {
REQUIRE_64BIT(ctx); REQUIRE_64BIT(ctx);