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hw/intc/loongarch_pch_msi: Fix msi vector convertion

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Loongarch pch msi intc connects to extioi controller, the range of irq
number is 64-255.  Add a property for irqbase, so that we can compute
the irq offset from the view of pch_msi controller with the method:

  msi vector (from view of upper extioi intc) - irqbase

Signed-off-by: Mao Bibo <maobibo@loongson.cn>
Message-Id: <20220701030740.2469162-1-maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Mao Bibo 2022-07-01 11:07:40 +08:00 • committed by Richard Henderson
parent 227e73c986
commit 490c03ab11
3 changed files with 23 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

22
hw/intc/loongarch_pch_msi.c
View file

@ -23,9 +23,14 @@ static uint64_t loongarch_msi_mem_read(void *opaque, hwaddr addr, unsigned size)
static void loongarch_msi_mem_write(void *opaque, hwaddr addr, static void loongarch_msi_mem_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(opaque); LoongArchPCHMSI *s = (LoongArchPCHMSI *)opaque;
int irq_num = val & 0xff; int irq_num;
/*
* vector number is irq number from upper extioi intc
* need subtract irq base to get msi vector offset
*/
irq_num = (val & 0xff) - s->irq_base;
trace_loongarch_msi_set_irq(irq_num); trace_loongarch_msi_set_irq(irq_num);
assert(irq_num < PCH_MSI_IRQ_NUM); assert(irq_num < PCH_MSI_IRQ_NUM);
qemu_set_irq(s->pch_msi_irq[irq_num], 1); qemu_set_irq(s->pch_msi_irq[irq_num], 1);
@ -58,11 +63,24 @@ static void loongarch_pch_msi_init(Object *obj)
qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM); qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM);
} }
static Property loongarch_msi_properties[] = {
DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
DEFINE_PROP_END_OF_LIST(),
};
static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_props(dc, loongarch_msi_properties);
}
static const TypeInfo loongarch_pch_msi_info = { static const TypeInfo loongarch_pch_msi_info = {
.name = TYPE_LOONGARCH_PCH_MSI, .name = TYPE_LOONGARCH_PCH_MSI,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(LoongArchPCHMSI), .instance_size = sizeof(LoongArchPCHMSI),
.instance_init = loongarch_pch_msi_init, .instance_init = loongarch_pch_msi_init,
.class_init = loongarch_pch_msi_class_init,
}; };
static void loongarch_pch_msi_register_types(void) static void loongarch_pch_msi_register_types(void)

1
hw/loongarch/loongson3.c
View file

@ -267,6 +267,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
} }
pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START);
d = SYS_BUS_DEVICE(pch_msi); d = SYS_BUS_DEVICE(pch_msi);
sysbus_realize_and_unref(d, &error_fatal); sysbus_realize_and_unref(d, &error_fatal);
sysbus_mmio_map(d, 0, LS7A_PCH_MSI_ADDR_LOW); sysbus_mmio_map(d, 0, LS7A_PCH_MSI_ADDR_LOW);

2
include/hw/intc/loongarch_pch_msi.h
View file

@ -17,4 +17,6 @@ struct LoongArchPCHMSI {
SysBusDevice parent_obj; SysBusDevice parent_obj;
qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM]; qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
MemoryRegion msi_mmio; MemoryRegion msi_mmio;
/* irq base passed to upper extioi intc */
unsigned int irq_base;
}; };