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target-mips: fix incorrect behaviour for EXTP
The mask for EXTP instruction when size=31 has not been correctly calculated. The test (mips32-dsp/extp.c) has been extended to include the case that triggers the issue. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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parent
91b96cdc5b
commit
489ed4bbae
2 changed files with 19 additions and 2 deletions
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@ -3415,8 +3415,7 @@ target_ulong helper_extp(target_ulong ac, target_ulong size, CPUMIPSState *env)
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if (sub >= -1) {
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if (sub >= -1) {
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acc = ((uint64_t)env->active_tc.HI[ac] << 32) |
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acc = ((uint64_t)env->active_tc.HI[ac] << 32) |
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((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
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((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
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temp = (acc >> (start_pos - size)) &
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temp = (acc >> (start_pos - size)) & (~0U >> (31 - size));
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(((uint32_t)0x01 << (size + 1)) - 1);
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set_DSPControl_efi(0, env);
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set_DSPControl_efi(0, env);
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} else {
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} else {
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set_DSPControl_efi(1, env);
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set_DSPControl_efi(1, env);
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@ -40,5 +40,23 @@ int main()
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dsp = (dsp >> 14) & 0x01;
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dsp = (dsp >> 14) & 0x01;
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assert(dsp == 1);
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assert(dsp == 1);
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ach = 0;
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acl = 0x80000001;
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dsp = 0x1F;
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result = 0x80000001;
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__asm
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("wrdsp %1\n\t"
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"mthi %2, $ac2\n\t"
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"mtlo %3, $ac2\n\t"
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"extp %0, $ac2, 0x1F\n\t"
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"rddsp %1\n\t"
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: "=r"(rt), "+r"(dsp)
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: "r"(ach), "r"(acl)
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);
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dsp = (dsp >> 14) & 0x01;
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assert(dsp == 0);
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assert(result == rt);
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return 0;
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return 0;
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}
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}
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