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exec: reintroduce MemoryRegion caching
MemoryRegionCache was reverted to "normal" address_space_* operations for 2.9, due to lack of support for IOMMUs. Reinstate the optimizations, caching only the IOMMU translation at address_cache_init but not the IOMMU lookup and target AddressSpace translation are not cached; now that MemoryRegionCache supports IOMMUs, it becomes more widely applicable too. The inlined fast path is defined in memory_ldst_cached.inc.h, while the slow path uses memory_ldst.inc.c as before. The smaller fast path causes a little code size reduction in MemoryRegionCache users: hw/virtio/virtio.o text size before: 32373 hw/virtio/virtio.o text size after: 31941 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
a411c84b56
commit
48564041a7
6 changed files with 280 additions and 20 deletions
121
exec.c
121
exec.c
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@ -3641,33 +3641,130 @@ int64_t address_space_cache_init(MemoryRegionCache *cache,
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hwaddr len,
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bool is_write)
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{
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cache->len = len;
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cache->as = as;
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cache->xlat = addr;
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return len;
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AddressSpaceDispatch *d;
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hwaddr l;
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MemoryRegion *mr;
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assert(len > 0);
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l = len;
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cache->fv = address_space_get_flatview(as);
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d = flatview_to_dispatch(cache->fv);
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cache->mrs = *address_space_translate_internal(d, addr, &cache->xlat, &l, true);
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mr = cache->mrs.mr;
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memory_region_ref(mr);
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if (memory_access_is_direct(mr, is_write)) {
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l = flatview_extend_translation(cache->fv, addr, len, mr,
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cache->xlat, l, is_write);
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cache->ptr = qemu_ram_ptr_length(mr->ram_block, cache->xlat, &l, true);
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} else {
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cache->ptr = NULL;
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}
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cache->len = l;
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cache->is_write = is_write;
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return l;
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}
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void address_space_cache_invalidate(MemoryRegionCache *cache,
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hwaddr addr,
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hwaddr access_len)
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{
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assert(cache->is_write);
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if (likely(cache->ptr)) {
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invalidate_and_set_dirty(cache->mrs.mr, addr + cache->xlat, access_len);
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}
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}
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void address_space_cache_destroy(MemoryRegionCache *cache)
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{
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cache->as = NULL;
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if (!cache->mrs.mr) {
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return;
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}
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if (xen_enabled()) {
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xen_invalidate_map_cache_entry(cache->ptr);
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}
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memory_region_unref(cache->mrs.mr);
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flatview_unref(cache->fv);
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cache->mrs.mr = NULL;
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cache->fv = NULL;
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}
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/* Called from RCU critical section. This function has the same
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* semantics as address_space_translate, but it only works on a
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* predefined range of a MemoryRegion that was mapped with
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* address_space_cache_init.
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*/
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static inline MemoryRegion *address_space_translate_cached(
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MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
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hwaddr *plen, bool is_write)
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{
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MemoryRegionSection section;
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MemoryRegion *mr;
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IOMMUMemoryRegion *iommu_mr;
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AddressSpace *target_as;
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assert(!cache->ptr);
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*xlat = addr + cache->xlat;
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mr = cache->mrs.mr;
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iommu_mr = memory_region_get_iommu(mr);
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if (!iommu_mr) {
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/* MMIO region. */
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return mr;
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}
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section = address_space_translate_iommu(iommu_mr, xlat, plen,
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NULL, is_write, true,
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&target_as);
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return section.mr;
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}
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/* Called from RCU critical section. address_space_read_cached uses this
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* out of line function when the target is an MMIO or IOMMU region.
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*/
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void
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address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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void *buf, int len)
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{
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hwaddr addr1, l;
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MemoryRegion *mr;
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l = len;
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mr = address_space_translate_cached(cache, addr, &addr1, &l, false);
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flatview_read_continue(cache->fv,
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addr, MEMTXATTRS_UNSPECIFIED, buf, len,
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addr1, l, mr);
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}
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/* Called from RCU critical section. address_space_write_cached uses this
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* out of line function when the target is an MMIO or IOMMU region.
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*/
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void
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address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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const void *buf, int len)
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{
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hwaddr addr1, l;
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MemoryRegion *mr;
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l = len;
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mr = address_space_translate_cached(cache, addr, &addr1, &l, true);
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flatview_write_continue(cache->fv,
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addr, MEMTXATTRS_UNSPECIFIED, buf, len,
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addr1, l, mr);
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}
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#define ARG1_DECL MemoryRegionCache *cache
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#define ARG1 cache
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#define SUFFIX _cached
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#define TRANSLATE(addr, ...) \
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address_space_translate(cache->as, cache->xlat + (addr), __VA_ARGS__)
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#define IS_DIRECT(mr, is_write) true
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#define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
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#define SUFFIX _cached_slow
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#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
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#define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
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#define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
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#define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
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#define RCU_READ_LOCK() rcu_read_lock()
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#define RCU_READ_UNLOCK() rcu_read_unlock()
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#define RCU_READ_LOCK() ((void)0)
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#define RCU_READ_UNLOCK() ((void)0)
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#include "memory_ldst.inc.c"
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/* virtual memory access for debug (includes writing to ROM) */
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