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hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses
cde3247651
fixed atomicity for LDRD, which
ends up making accesses 64-bits wide. However, the AST2600 bootloader
can sometimes compile with LDRD instructions, which causes the acceses
to fail when accessing the memory-mapped SPI flash.
To fix this, increase the MMIO region valid access size to allow for
64-bit accesses.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250422002747.2593465-1-komlodi@google.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
parent
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commit
47cdaa46f3
1 changed files with 2 additions and 2 deletions
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@ -359,7 +359,7 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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.max_access_size = 8,
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},
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};
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@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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.max_access_size = 8,
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},
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};
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