mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-06 01:03:55 -06:00
added PCI bus
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@961 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
7c29d0c0cf
commit
46e50e9d58
9 changed files with 70 additions and 64 deletions
|
@ -2891,7 +2891,7 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
|
|||
s->cirrus_mmio_io_addr);
|
||||
}
|
||||
|
||||
void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
||||
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
||||
unsigned long vga_ram_offset, int vga_ram_size)
|
||||
{
|
||||
PCICirrusVGAState *d;
|
||||
|
@ -2902,9 +2902,9 @@ void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
|||
device_id = CIRRUS_ID_CLGD5446;
|
||||
|
||||
/* setup PCI configuration registers */
|
||||
d = (PCICirrusVGAState *)pci_register_device("Cirrus VGA",
|
||||
d = (PCICirrusVGAState *)pci_register_device(bus, "Cirrus VGA",
|
||||
sizeof(PCICirrusVGAState),
|
||||
0, -1, NULL, NULL);
|
||||
-1, NULL, NULL);
|
||||
pci_conf = d->dev.config;
|
||||
pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
|
||||
pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
|
||||
|
|
13
hw/ide.c
13
hw/ide.c
|
@ -1579,14 +1579,14 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
|
|||
}
|
||||
|
||||
/* hd_table must contain 4 block drivers */
|
||||
void pci_ide_init(BlockDriverState **hd_table)
|
||||
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
|
||||
{
|
||||
PCIIDEState *d;
|
||||
uint8_t *pci_conf;
|
||||
int i;
|
||||
|
||||
d = (PCIIDEState *)pci_register_device("IDE", sizeof(PCIIDEState),
|
||||
0, -1,
|
||||
d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
|
||||
-1,
|
||||
NULL, NULL);
|
||||
pci_conf = d->dev.config;
|
||||
pci_conf[0x00] = 0x86; // Intel
|
||||
|
@ -1621,14 +1621,15 @@ void pci_ide_init(BlockDriverState **hd_table)
|
|||
|
||||
/* hd_table must contain 4 block drivers */
|
||||
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
|
||||
void pci_piix3_ide_init(BlockDriverState **hd_table)
|
||||
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
|
||||
{
|
||||
PCIIDEState *d;
|
||||
uint8_t *pci_conf;
|
||||
|
||||
/* register a function 1 of PIIX3 */
|
||||
d = (PCIIDEState *)pci_register_device("PIIX3 IDE", sizeof(PCIIDEState),
|
||||
0, ((PCIDevice *)piix3_state)->devfn + 1,
|
||||
d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
|
||||
sizeof(PCIIDEState),
|
||||
((PCIDevice *)piix3_state)->devfn + 1,
|
||||
NULL, NULL);
|
||||
pci_conf = d->dev.config;
|
||||
pci_conf[0x00] = 0x86; // Intel
|
||||
|
|
|
@ -613,14 +613,15 @@ static void ne2000_map(PCIDevice *pci_dev, int region_num,
|
|||
register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
|
||||
}
|
||||
|
||||
void pci_ne2000_init(NetDriverState *nd)
|
||||
void pci_ne2000_init(PCIBus *bus, NetDriverState *nd)
|
||||
{
|
||||
PCINE2000State *d;
|
||||
NE2000State *s;
|
||||
uint8_t *pci_conf;
|
||||
|
||||
d = (PCINE2000State *)pci_register_device("NE2000", sizeof(PCINE2000State),
|
||||
0, -1,
|
||||
d = (PCINE2000State *)pci_register_device(bus,
|
||||
"NE2000", sizeof(PCINE2000State),
|
||||
-1,
|
||||
NULL, NULL);
|
||||
pci_conf = d->dev.config;
|
||||
pci_conf[0x00] = 0xec; // Realtek 8029
|
||||
|
|
|
@ -964,7 +964,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num,
|
|||
#endif
|
||||
}
|
||||
|
||||
openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
|
||||
openpic_t *openpic_init (PCIBus *bus,
|
||||
uint32_t isu_base, uint32_t idu_base, int nb_cpus)
|
||||
{
|
||||
openpic_t *opp;
|
||||
uint8_t *pci_conf;
|
||||
|
@ -973,8 +974,8 @@ openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
|
|||
/* XXX: for now, only one CPU is supported */
|
||||
if (nb_cpus != 1)
|
||||
return NULL;
|
||||
opp = (openpic_t *)pci_register_device("OpenPIC", sizeof(openpic_t),
|
||||
0, -1, NULL, NULL);
|
||||
opp = (openpic_t *)pci_register_device(bus, "OpenPIC", sizeof(openpic_t),
|
||||
-1, NULL, NULL);
|
||||
if (opp == NULL)
|
||||
return NULL;
|
||||
pci_conf = opp->pci_dev.config;
|
||||
|
|
20
hw/pc.c
20
hw/pc.c
|
@ -324,7 +324,8 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
int ret, linux_boot, initrd_size, i, nb_nics1, fd;
|
||||
unsigned long bios_offset, vga_bios_offset;
|
||||
int bios_size, isa_bios_size;
|
||||
|
||||
PCIBus *pci_bus;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
/* allocate RAM */
|
||||
|
@ -432,8 +433,10 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
}
|
||||
|
||||
if (pci_enabled) {
|
||||
i440fx_init();
|
||||
piix3_init();
|
||||
pci_bus = i440fx_init();
|
||||
piix3_init(pci_bus);
|
||||
} else {
|
||||
pci_bus = NULL;
|
||||
}
|
||||
|
||||
/* init basic PC hardware */
|
||||
|
@ -443,15 +446,16 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
|
||||
if (cirrus_vga_enabled) {
|
||||
if (pci_enabled) {
|
||||
pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
|
||||
pci_cirrus_vga_init(pci_bus,
|
||||
ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size);
|
||||
} else {
|
||||
isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size);
|
||||
}
|
||||
} else {
|
||||
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size, pci_enabled);
|
||||
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size);
|
||||
}
|
||||
|
||||
rtc_state = rtc_init(0x70, 8);
|
||||
|
@ -469,9 +473,9 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
|
||||
if (pci_enabled) {
|
||||
for(i = 0; i < nb_nics; i++) {
|
||||
pci_ne2000_init(&nd_table[i]);
|
||||
pci_ne2000_init(pci_bus, &nd_table[i]);
|
||||
}
|
||||
pci_piix3_ide_init(bs_table);
|
||||
pci_piix3_ide_init(pci_bus, bs_table);
|
||||
} else {
|
||||
nb_nics1 = nb_nics;
|
||||
if (nb_nics1 > NE2000_NB_MAX)
|
||||
|
|
|
@ -89,13 +89,12 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
|
|||
cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
|
||||
}
|
||||
|
||||
static void macio_init(void)
|
||||
static void macio_init(PCIBus *bus)
|
||||
{
|
||||
PCIDevice *d;
|
||||
|
||||
d = pci_register_device("macio", sizeof(PCIDevice),
|
||||
0, -1,
|
||||
NULL, NULL);
|
||||
d = pci_register_device(bus, "macio", sizeof(PCIDevice),
|
||||
-1, NULL, NULL);
|
||||
/* Note: this code is strongly inspirated from the corresponding code
|
||||
in PearPC */
|
||||
d->config[0x00] = 0x6b; // vendor_id
|
||||
|
@ -128,7 +127,8 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
int ret, linux_boot, i, fd;
|
||||
unsigned long bios_offset;
|
||||
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
|
||||
|
||||
PCIBus *pci_bus;
|
||||
|
||||
linux_boot = (kernel_filename != NULL);
|
||||
|
||||
/* allocate RAM */
|
||||
|
@ -182,17 +182,18 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
|
||||
|
||||
isa_mem_base = 0x80000000;
|
||||
pci_pmac_init();
|
||||
pci_bus = pci_pmac_init();
|
||||
|
||||
/* Register 8 MB of ISA IO space */
|
||||
PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
|
||||
cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
|
||||
|
||||
/* init basic PC hardware */
|
||||
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size, 1);
|
||||
openpic = openpic_init(0x00000000, 0xF0000000, 1);
|
||||
|
||||
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size);
|
||||
openpic = openpic_init(pci_bus, 0x00000000, 0xF0000000, 1);
|
||||
pci_pmac_set_openpic(pci_bus, openpic);
|
||||
|
||||
/* XXX: suppress that */
|
||||
pic_init();
|
||||
|
||||
|
@ -201,7 +202,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
serial_init(0x3f8, 4, fd);
|
||||
|
||||
for(i = 0; i < nb_nics; i++) {
|
||||
pci_ne2000_init(&nd_table[i]);
|
||||
pci_ne2000_init(pci_bus, &nd_table[i]);
|
||||
}
|
||||
|
||||
ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
|
||||
|
@ -213,7 +214,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
adb_kbd_init(&adb_bus);
|
||||
adb_mouse_init(&adb_bus);
|
||||
|
||||
macio_init();
|
||||
macio_init(pci_bus);
|
||||
|
||||
nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
|
||||
|
||||
|
|
|
@ -418,6 +418,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
int ret, linux_boot, i, nb_nics1, fd;
|
||||
unsigned long bios_offset;
|
||||
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
|
||||
PCIBus *pci_bus;
|
||||
|
||||
sysctrl = qemu_mallocz(sizeof(sysctrl_t));
|
||||
if (sysctrl == NULL)
|
||||
|
@ -477,14 +478,14 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
|
||||
|
||||
isa_mem_base = 0xc0000000;
|
||||
pci_prep_init();
|
||||
pci_bus = pci_prep_init();
|
||||
/* Register 64 KB of ISA IO space */
|
||||
PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
|
||||
cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
|
||||
|
||||
/* init basic PC hardware */
|
||||
vga_initialize(ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size, 1);
|
||||
vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
|
||||
vga_ram_size);
|
||||
rtc_init(0x70, 8);
|
||||
// openpic = openpic_init(0x00000000, 0xF0000000, 1);
|
||||
// pic_init(openpic);
|
||||
|
@ -545,6 +546,4 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
|
|||
/* XXX: need an option to load a NVRAM image */
|
||||
0,
|
||||
graphic_width, graphic_height, graphic_depth);
|
||||
|
||||
pci_ppc_bios_init();
|
||||
}
|
||||
|
|
12
hw/vga.c
12
hw/vga.c
|
@ -1747,9 +1747,8 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
|
|||
}
|
||||
|
||||
|
||||
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
|
||||
unsigned long vga_ram_offset, int vga_ram_size,
|
||||
int is_pci)
|
||||
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
||||
unsigned long vga_ram_offset, int vga_ram_size)
|
||||
{
|
||||
VGAState *s;
|
||||
|
||||
|
@ -1805,14 +1804,13 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
|
|||
cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000,
|
||||
vga_io_memory);
|
||||
|
||||
if (is_pci) {
|
||||
if (bus) {
|
||||
PCIDevice *d;
|
||||
uint8_t *pci_conf;
|
||||
|
||||
d = pci_register_device("VGA",
|
||||
d = pci_register_device(bus, "VGA",
|
||||
sizeof(PCIDevice),
|
||||
0, -1,
|
||||
NULL, NULL);
|
||||
-1, NULL, NULL);
|
||||
pci_conf = d->config;
|
||||
pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
|
||||
pci_conf[0x01] = 0x12;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue