mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-06 01:03:55 -06:00
char: i.MX: Add support for "TX complete" interrupt
Add support for "TX complete"/TXDC interrupt generate by real HW since it is needed to support guests other than Linux. Based on the patch by Bill Paul as found here: https://bugs.launchpad.net/qemu/+bug/1753314 Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: Bill Paul <wpaul@windriver.com> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bill Paul <wpaul@windriver.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Message-id: 20180315191141.6789-2-andrew.smirnov@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
824e4a12f3
commit
46d3fb634c
2 changed files with 20 additions and 3 deletions
|
@ -67,6 +67,8 @@
|
|||
#define UCR2_RXEN (1<<1) /* Receiver enable */
|
||||
#define UCR2_SRST (1<<0) /* Reset complete */
|
||||
|
||||
#define UCR4_TCEN BIT(3) /* TX complete interrupt enable */
|
||||
|
||||
#define UTS1_TXEMPTY (1<<6)
|
||||
#define UTS1_RXEMPTY (1<<5)
|
||||
#define UTS1_TXFULL (1<<4)
|
||||
|
@ -95,6 +97,7 @@ typedef struct IMXSerialState {
|
|||
uint32_t ubmr;
|
||||
uint32_t ubrc;
|
||||
uint32_t ucr3;
|
||||
uint32_t ucr4;
|
||||
|
||||
qemu_irq irq;
|
||||
CharBackend chr;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue