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Misc hardware patch queue
- MAINTAINERS updates (Zoltan, Thomas) - Fix cutils::get_relocated_path on Windows host (Akihiko) - Housekeeping in Memory APIs (Marc-André) - SDHCI fix for SDMA transfer (Lu, Jianxian) - Various QOM/QDev/SysBus cleanups (Philippe) - Constify QemuInputHandler structure (Philippe) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmUxnKAACgkQ4+MsLN6t wN6UPw//abFZgckpxDYow4UfMu7esvkhICBvXjqDEdX2U/PBYmef049T5RVW8oDm NWnxRA9XydzTeToH56tU2tjXbjWKF5LcJVwrCNl6XFRdLYaR3hzejm96hX99C89J PB/2ineeAwidBoFfgjkvz0FLRr1ePaN74YXedPSHzywG+0dAOvpNUubbsggn3i5k 1wTlgfDvL6iz8NMEOSBp6cv5D4Ix0WshkqlCac0gQ74lYSM1tk/EeRiSy2IHWQQB 4FHd9Wo9brzLQCbhbb4FapTK0POScy0LebzRWOWfLtyWS+FRBC3kxO126I67CwMb XRS4YgBqC3U7IGsbzV+fWP01pVeJRzZ1vrv4vdiIYvqTdgNlmFbGjJUwEmPmrokt q5UreAjMUNLMEXiY6QHFq3N5I+UMY1jslcf7K/ZwDqSlqaquAe+gbnQOAMXDYgb6 GWsBrLM2WA5E9ObbxsHdxgZqW1NxcWJpSBvjNiOV9t/jqoqpxYwHr5HAvR1xUwm+ qRKRayRpLlX/Yad4NlvJaH5jvsMrI4bnxTYWVevLvYzc07Xo3dVxW1c+P+WCdjfM O3bLAvwO7Mw7GRiSNpU8zTbRJu/dS4NWDWZ24u606Cy7qD/qouz89JjkKVYYSFkX vNp7YOenPf4K6pak/lC3NOLIPlYmnnCLv3RCiaO6wHi4bk1yEBU= =9dZy -----END PGP SIGNATURE----- Merge tag 'hw-misc-20231019' of https://github.com/philmd/qemu into staging Misc hardware patch queue - MAINTAINERS updates (Zoltan, Thomas) - Fix cutils::get_relocated_path on Windows host (Akihiko) - Housekeeping in Memory APIs (Marc-André) - SDHCI fix for SDMA transfer (Lu, Jianxian) - Various QOM/QDev/SysBus cleanups (Philippe) - Constify QemuInputHandler structure (Philippe) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmUxnKAACgkQ4+MsLN6t # wN6UPw//abFZgckpxDYow4UfMu7esvkhICBvXjqDEdX2U/PBYmef049T5RVW8oDm # NWnxRA9XydzTeToH56tU2tjXbjWKF5LcJVwrCNl6XFRdLYaR3hzejm96hX99C89J # PB/2ineeAwidBoFfgjkvz0FLRr1ePaN74YXedPSHzywG+0dAOvpNUubbsggn3i5k # 1wTlgfDvL6iz8NMEOSBp6cv5D4Ix0WshkqlCac0gQ74lYSM1tk/EeRiSy2IHWQQB # 4FHd9Wo9brzLQCbhbb4FapTK0POScy0LebzRWOWfLtyWS+FRBC3kxO126I67CwMb # XRS4YgBqC3U7IGsbzV+fWP01pVeJRzZ1vrv4vdiIYvqTdgNlmFbGjJUwEmPmrokt # q5UreAjMUNLMEXiY6QHFq3N5I+UMY1jslcf7K/ZwDqSlqaquAe+gbnQOAMXDYgb6 # GWsBrLM2WA5E9ObbxsHdxgZqW1NxcWJpSBvjNiOV9t/jqoqpxYwHr5HAvR1xUwm+ # qRKRayRpLlX/Yad4NlvJaH5jvsMrI4bnxTYWVevLvYzc07Xo3dVxW1c+P+WCdjfM # O3bLAvwO7Mw7GRiSNpU8zTbRJu/dS4NWDWZ24u606Cy7qD/qouz89JjkKVYYSFkX # vNp7YOenPf4K6pak/lC3NOLIPlYmnnCLv3RCiaO6wHi4bk1yEBU= # =9dZy # -----END PGP SIGNATURE----- # gpg: Signature made Thu 19 Oct 2023 14:16:16 PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20231019' of https://github.com/philmd/qemu: (46 commits) ui/input: Constify QemuInputHandler structure hw/net: Declare link using static DEFINE_PROP_LINK() macro hw/dma: Declare link using static DEFINE_PROP_LINK() macro hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros hw/virtio/virtio-pmem: Replace impossible check by assertion hw/s390x/css-bridge: Realize sysbus device before accessing it hw/isa: Realize ISA bridge device before accessing it hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it hw/acpi: Realize ACPI_GED sysbus device before accessing it hw/pci-host/bonito: Do not use SysBus API to map local MMIO region hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region hw/audio/pcspk: Inline pcspk_init() hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region hw/intc/spapr_xive: Move sysbus_init_mmio() calls around hw/ppc/pnv: Do not use SysBus API to map local MMIO region ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
46919512fc
72 changed files with 232 additions and 273 deletions
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@ -56,7 +56,7 @@ typedef struct AcpiPciHpState {
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} AcpiPciHpState;
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void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
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MemoryRegion *address_space_io, uint16_t io_base);
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MemoryRegion *io, uint16_t io_base);
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bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus);
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void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
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@ -25,16 +25,6 @@
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#ifndef HW_PCSPK_H
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#define HW_PCSPK_H
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#include "hw/isa/isa.h"
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#include "hw/qdev-properties.h"
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#include "qapi/error.h"
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#define TYPE_PC_SPEAKER "isa-pcspk"
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static inline void pcspk_init(ISADevice *isadev, ISABus *bus, ISADevice *pit)
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{
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object_property_set_link(OBJECT(isadev), "pit", OBJECT(pit), NULL);
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isa_realize_and_unref(isadev, bus, &error_fatal);
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}
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#endif /* HW_PCSPK_H */
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@ -618,8 +618,10 @@ bool cpu_paging_enabled(const CPUState *cpu);
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* @cpu: The CPU whose memory mappings are to be obtained.
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* @list: Where to write the memory mappings to.
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* @errp: Pointer for reporting an #Error.
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*
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* Returns: %true on success, %false otherwise.
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*/
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void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
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bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
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Error **errp);
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#if !defined(CONFIG_USER_ONLY)
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@ -19,7 +19,7 @@ typedef struct SysemuCPUOps {
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/**
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* @get_memory_mapping: Callback for obtaining the memory mappings.
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*/
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void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
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bool (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
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Error **errp);
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/**
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* @get_paging_enabled: Callback for inquiring whether paging is enabled.
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@ -1,14 +0,0 @@
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#ifndef HW_MIPS_CPUDEVS_H
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#define HW_MIPS_CPUDEVS_H
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#include "target/mips/cpu-qom.h"
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/* Definitions for MIPS CPU internal devices. */
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/* mips_int.c */
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void cpu_mips_irq_init_cpu(MIPSCPU *cpu);
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/* mips_timer.c */
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void cpu_mips_clock_init(MIPSCPU *cpu);
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#endif
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@ -73,10 +73,12 @@ struct MIPSITUState {
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/* SAAR */
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uint64_t *saar;
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MIPSCPU *cpu0;
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ArchCPU *cpu0;
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};
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/* Get ITC Configuration Tag memory region. */
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MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu);
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void itc_reconfigure(struct MIPSITUState *tag);
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#endif /* MIPS_ITU_H */
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@ -279,12 +279,10 @@ bool pci_bus_is_express(const PCIBus *bus);
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void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent,
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const char *name,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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MemoryRegion *mem, MemoryRegion *io,
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uint8_t devfn_min, const char *typename);
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PCIBus *pci_root_bus_new(DeviceState *parent, const char *name,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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MemoryRegion *mem, MemoryRegion *io,
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uint8_t devfn_min, const char *typename);
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void pci_root_bus_cleanup(PCIBus *bus);
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void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
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@ -304,8 +302,7 @@ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
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PCIBus *pci_register_root_bus(DeviceState *parent, const char *name,
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pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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void *irq_opaque,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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MemoryRegion *mem, MemoryRegion *io,
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uint8_t devfn_min, int nirq,
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const char *typename);
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void pci_unregister_root_bus(PCIBus *bus);
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@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass {
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#define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */
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#define PNV10_XSCOM_PEC_PCI_SIZE 0x200
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void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
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void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr);
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int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
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uint64_t xscom_base, uint64_t xscom_size,
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const char *compat, int compat_size);
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@ -84,7 +84,7 @@ struct VirtIOInputHID {
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VirtIOInput parent_obj;
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char *display;
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uint32_t head;
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QemuInputHandler *handler;
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const QemuInputHandler *handler;
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QemuInputHandlerState *hs;
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int ledstate;
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bool wheel_axis;
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