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target/riscv: refactor (anonymous struct) RISCVCPU.cfg into 'struct RISCVCPUConfig'

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Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220202005249.3566542-2-philipp.tomsich@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Philipp Tomsich 2022-02-02 01:52:43 +01:00 • committed by Alistair Francis
parent 6c3a924725
commit 466292bd4a
1 changed files with 41 additions and 37 deletions
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42
target/riscv/cpu.h
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@ -303,24 +303,7 @@ struct RISCVCPUClass {
DeviceReset parent_reset;
};
/**
* RISCVCPU:
* @env: #CPURISCVState
*
* A RISCV CPU.
*/
struct RISCVCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUNegativeOffsetState neg;
CPURISCVState env;
char *dyn_csr_xml;
char *dyn_vreg_xml;
/* Configuration Settings */
struct {
struct RISCVCPUConfig {
bool ext_i;
bool ext_e;
bool ext_g;
@ -356,7 +339,28 @@ struct RISCVCPU {
bool pmp;
bool epmp;
uint64_t resetvec;
} cfg;
};
typedef struct RISCVCPUConfig RISCVCPUConfig;
/**
* RISCVCPU:
* @env: #CPURISCVState
*
* A RISCV CPU.
*/
struct RISCVCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUNegativeOffsetState neg;
CPURISCVState env;
char *dyn_csr_xml;
char *dyn_vreg_xml;
/* Configuration Settings */
RISCVCPUConfig cfg;
};
static inline int riscv_has_ext(CPURISCVState *env, target_ulong ext)