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target-alpha: Convert opcode 0x1E to source/sink

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Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2014-03-19 09:28:55 -07:00
parent c67b67e511
commit 46010969f3
1 changed files with 4 additions and 2 deletions
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6
target-alpha/translate.c
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@ -2962,6 +2962,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
goto invalid_opc; goto invalid_opc;
} }
break; break;
case 0x1D: case 0x1D:
/* HW_MTPR (PALcode) */ /* HW_MTPR (PALcode) */
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
@ -2970,6 +2971,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
#else #else
goto invalid_opc; goto invalid_opc;
#endif #endif
case 0x1E: case 0x1E:
/* HW_RET (PALcode) */ /* HW_RET (PALcode) */
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
@ -2978,12 +2980,12 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
/* Pre-EV6 CPUs interpreted this as HW_REI, loading the return /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return
address from EXC_ADDR. This turns out to be useful for our address from EXC_ADDR. This turns out to be useful for our
emulation PALcode, so continue to accept it. */ emulation PALcode, so continue to accept it. */
TCGv tmp = tcg_temp_new(); tmp = tcg_temp_new();
tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr)); tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
gen_helper_hw_ret(cpu_env, tmp); gen_helper_hw_ret(cpu_env, tmp);
tcg_temp_free(tmp); tcg_temp_free(tmp);
} else { } else {
gen_helper_hw_ret(cpu_env, cpu_ir[rb]); gen_helper_hw_ret(cpu_env, load_gpr(ctx, rb));
} }
ret = EXIT_PC_UPDATED; ret = EXIT_PC_UPDATED;
break; break;